参数资料
型号: LTC4213CDDB#TRMPBF
厂商: Linear Technology
文件页数: 9/20页
文件大小: 0K
描述: IC CIRC BREAK ELEC 8-DFN
标准包装: 500
系列: *
类型: *
应用: *
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-DFN(3x2)
包装: 带卷 (TR)
LTC4213
17
4213f
The selected MOSFET VGSabsolutemaximumratingshould
meet the LTC4213 maximum VGSMAX of 8V.
Other MOSFET criteria such as VBDSS, IDMAX, and RDSON
should be reviewed. Spikes and ringing above maximum
operating voltage should be considered when choosing
VBDSS. IDMAX should be greater than the current limit. The
maximum operating load current is determined by the
RDSON value. See the section on “Calculating Current
Limit” for details.
Supply Requirements
The LTC4213 can be powered from a single supply or dual
supply system. The load supply is connected to the
SENSEP pin and the drain of the external MOSFET. In the
single supply case, the VCC pin is connected to the load
supply, preferably with an RC filter. With dual supplies,
VCC is connected to an auxiliary bias supply VAUX where
VAUX voltage should be greater or equal to the load supply
voltage. The load supply voltage must be capable of
sourcing more current than the circuit breaker limit. If the
load supply current limit is below the circuit breaker trip
current, the LTC4213 may not react when the output
overloads. Furthermore, output overloads may trigger
UVLO if the load supply has foldback current limit in a
single supply system.
VIN Transient and Overvoltage Protection
Input transient spikes are commonly observed whenever
the LTC4213 responds to overload. These spikes can be
large in amplitude, especially given that large decoupling
capacitors are absent in hot swap environments. These
short spikes can be clipped with a transient suppressor of
adequate voltage and power rating. In addition, the LTC4213
can detect a prolonged overvoltage condition. When
APPLICATIO S I FOR ATIO
WU
U
point 6 should be within the circuit breaker limits. Other-
wise, the system fails to start and the circuit breaker trips
immediately after arming. In most applications additional
external gate capacitance is not required unless CLOAD is
large and startup becomes problematic. If an external gate
capacitor is employed, its capacitance value should not be
excessive unless it is used with a series resistor. This is
because a big gate capacitor without resistor slows down
the GATE turn off during a fault. An alternative method
would be a stepped ISEL pin to allow a higher current limit
during startup.
In the event of output short circuit or a severe overload, the
load supply can collapse during GATE ramp up due to load
supply current limit. The chosen MOSFET must withstand
this possible brief short circuit condition before time
point 6 where the circuit breaker is allowed to trip. Bench
short circuit evaluation is a practical verification of a
reliable design. To have current limit while powering a
MOSFET into short circuit conditions, it is preferred that
the load supply sequences to turn on after the circuit
breaker is armed as described in an earlier section.
Power-Off Cycle
The system can be powered off by toggling the ON pin low.
When ON is brought below 0.76V for 5s, the GATE and
READY pins are pulled low. The system resets when ON is
brought below 0.4V for 80s.
MOSFET Selection
The LTC4213 is designed to be used with logic (5V) and
sub-logic (3V) MOSFETs for VCC potentials above 2.97V
with VGSMAX exceeding 4.5V. For a VCC supply range
between 2.3V and 2.97V, sub-logic MOSFETs should be
used as the minimum VGSMAX is less than 4.5V.
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