参数资料
型号: LTC4240IGN
厂商: Linear Technology
文件页数: 12/28页
文件大小: 493K
描述: IC CTRLR HOT SWAP CPCI 28-SSOP
标准包装: 49
类型: 热交换控制器
应用: CompactPCI?
内部开关:
电源电压: 3.3V,5V,±12V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
供应商设备封装: 28-SSOP
包装: 管件
LTC4240
12
4240f
used to turn off/on the power switches, turn on the status
LED (alerting the user that its safe to remove the plug-in
board), and assert the LOCAL_PCI_RST# signal. The I
2
C
bus is also used to read the logic signals of several device
pins: FAULT, PWRGD, RESETIN, and RESETOUT. Addi-
tionally, when a supply generates a current fault, the I
2
C
bus can be used to determine which supply generated the
fault. See Send Byte and Receive Byte sections for a full
description of all I
2
C features.
The LTC4240 supports Send Byte and Receive Byte proto-
cols. Communication is achieved using the SCL and SDA
pins (TTL compatible input thresholds). The SCL pin is the
clock input from the I
2
C bus (host) to the LTC4240 (slave).
The maximum SCL frequency is 100kHz. SDA is the
bidirectional data transfer line between the I
2
C bus and the
LTC4240. Send Byte and Receive Byte protocols are both
comprised of 2 bytes. The first byte for both is the address
byte. All communication begins with a START command.
Programming the I
2
C Address
The voltage on the ADDRIN pin determines the I
2
C ad-
dress. The ADDRIN voltage is set externally with a resistor
divider from 5V
IN
 to ground (resistor placement must be
close to the pin, do not place a bypass capacitor on
ADDRIN). This voltage is fed to a 5-bit A/D and compared
against the address byte clocked in by the I
2
C bus. The 5-
bit A/D allows 32 unique LTC4240 devices to be connected
on the same I
2
C bus. 1% resistors should be used to place
the voltage at ADDRIN approximately 0.5 LSB away from
each code transition. Table 1 shows recommended resis-
tor values for each of the address code segments. The
resistor ratio for each code segment has been optimized
for best performance over the specified temperature range.
The parallel resistance for the address setting resistors
should be kept under 10k.
APPLICATIO S I FOR ATIO
U
U
U
Table 1. Suggested ADDRIN 1% Resistor Values
ADDR   RECOMMENDED   ALLOWED ADDRIN    R
19(TOP)
R
20(BOT)
CODE  ADDRIN VOLTAGE   VOLTAGE RANGE   RESISTOR   RESISTOR
00
0.108125
0.080 to 0.136
8660
191
01
0.264375
0.236 to 0.293
2550
140
02
0.420625
0.393 to 0.449
2550
237
03
0.576875
0.549 to 0.605
2550
332
04
0.733125
0.705 to 0.761
2550
442
05
0.889375
0.861 to 0.918
2550
549
06
1.045625
1.018 to 1.074
3830
1020
07
1.201875
1.174 to 1.230
2550
806
08
1.358125
1.330 to 1.386
2550
953
09
1.514375
1.486 to 1.543
1150
499
10
1.670625
1.643 to 1.699
1020
511
11
1.826875
1.799 to 1.860
8660
4990
12
1.983125
1.955 to 2.021
2550
1690
13
2.139375
2.111 to 2.175
2550
1910
14
2.295625
2.268 to 2.330
1130
1130
15
2.451875
2.424 to 2.488
1370
1330
16
2.608125
2.580 to 2.644
2550
2800
17
2.764375
2.736 to 2.800
2550
3160
18
2.920625
2.888 to 2.950
2550
3570
19
3.076875
3.044 to 3.110
715
1150
20
3.233125
3.200 to 3.262
1150
2100
21
3.389375
3.356 to 3.421
1150
2430
22
3.545625
3.513 to 3.574
1150
2800
23
3.701875
3.669 to 3.731
357
1020
24
3.858125
3.825 to 3.886
2550
8660
25
4.014375
3.981 to 4.041
249
1020
26
4.170625
4.138 to 4.190
1070
5360
27
4.326875
4.294 to 4.349
178
1150
28
4.483125
4.450 to 4.499
133
1150
29
4.639375
4.606 to 4.651
102
1300
30
4.795625
4.763 to 4.805
105
2430
31
4.951875
4.919 to 4.962
100
10000
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