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参数资料
| 型号： | LTC4240IGN |
| 厂商： | Linear Technology |
| 文件页数： | 17/28页 |
| 文件大小： | 493K |
| 描述： | IC CTRLR HOT SWAP CPCI 28-SSOP |
| 标准包装： | 49 |
| 类型： | 热交换控制器 |
| 应用： | CompactPCI? |
| 内部开关： | 无 |
| 电源电压： | 3.3V，5V，±12V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 管件 |
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LTC4240
17
4240f
Note that capacitor C1 performs dual functions. In addi-
tion to controlling the ramp up rates of the 5V and 3.3V
outputs, it also compensates the current limit loop.
Current limit faults are ignored while the TIMER voltage is
less than 5.5V.
Once all four supplies are within tolerance, the PWRGD pin
(HEALTHY#) will be pulled low and LOCAL_PCI_RESET#
(RESETOUT) is free to follow PCI_RST#. Bit 3 of the I
2
C
command latch powers up low, thus not asserting
LOCAL_PCI_RST#.
Power-Down Sequence
When either BD_SEL# (OFF/ON) or Bit 2 of the command
latch (C2) is set high, a power-down sequence begins
(Figure 5).
The TIMER pin is immediately pulled low. The GATE pin
(Pin 19) is pulled down by a 200礎 current source to
prevent the load currents on the 3.3V and 5V supplies from
going to zero instantaneously and glitching the power
supply voltages. Internal switches are connected to each
of the output supply voltage pins to discharge the output
bulk capacitors to ground. When any one of the output
voltages drops below its PWRGD threshold, the HEALTHY#
signal pulls high, LOCAL_PCI_RST# (RESETOUT) is as-
serted low, and the external status LED turns on.
Once the power-down sequence is complete the status
LED will light up and the CPCI card may be removed from
the slot. During extraction, the precharge circuit will
continue to bias the bus I/O pins at 1V until the long
connector pin connections are broken.
Early Power
Early Power usage is restricted by the CompactPCI (CPCI)
specification. It is intended to power up the precharge
circuit and I/O cells. The CPCI specification allows any of
the long power pins (5V, 3.3V, V(I/O)) to be used for Early
Power. Since Early Power is not isolated, a resistor should
be placed in series with each CPCI connector pin. Note that
if any Early Power pin is shorted on the inserted card, the
current limiting resistor will dissipate the power.
In order to maximize the DC current available from the 5V
supply, all eight 5V connector pins should be tied together
on the inserted card. The same applies to the ten 3.3V CPCI
connector pins. Early Power should then be drawn from
either or both of the two V(I/O) long pins. If either or both
of 5V and 3.3V is used for Early Power, then the 5V and
3.3V sense resistor values must be chosen such that the
1A/pin CPCI rule is not violated.
Connecting V
EEIN
To lessen the likelihood of faulting on power up, the V
EEOUT
output pin should be bypassed with a capacitor that is only
as large as necessary. A value of 10礔 to 47礔 is recom-
mended. If a large value bypass capacitor is used (e.g.
e100礔) on V
EEOUT
, current limit faults may occur during
power-up or during recovery from power failures.
TIMER
10V/DIV
GATE
10V/DIV
12V
OUT
10V/DIV
V
EEOUT
10V/DIV
5V
OUT
10V/DIV
3V
OUT
10V/DIV
LCL_PCI_RST#
5V/DIV
BD_SEL#
5V/DIV
HEALTHY#
5V/DIV
10ms/DIV
4240 F05
Figure 5. Normal Power-Down Sequence
APPLICATIO S I FOR ATIO
U
U
U
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| LTC4240IGN#PBF | 功能描述:IC CTRLR HOTSWAP CPCI I2C 28SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 热交换 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:119 系列:- 类型:热交换控制器 应用:通用型，PCI Express? 内部开关:无 电流限制:- 电源电压:3.3V，12V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:80-TQFP 供应商设备封装:80-TQFP（12x12） 包装:托盘 产品目录页面:1423 (CN2011-ZH PDF) |
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