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| 型号： | LTC4244IGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/28页 |
| 文件大小： | 337K |
| 描述： | IC CTRLR HOTSWAP PCI 20-SSOP |
| 标准包装： | 2,500 |
| 类型： | 热交换控制器 |
| 应用： | CompactPCI? |
| 内部开关： | 无 |
| 电源电压： | 3.3V，5V，±12V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 带卷 (TR) |
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17
LTC4244/LTC4244-1
42441f
Calculating R
SENSE
Determining the most appropriate value for the sense
resistor first requires knowing the maximum current needed
by the load under worst-case conditions. Two other pa-
rameters affect the value of the sense resistor. First is the
tolerance of the LTC4244s circuit breaker threshold volt-
age. The LTC4244s nominal circuit breaker threshold
voltage is V
CB(NOM)
= 52mV; however it exhibits ?mV
tolerance over process and temperature. Second is the
tolerance (RTOL) of the sense resistor. Sense resistors are
available in RTOLs of ?%, ?% and ?% and exhibit
temperature coefficients of resistance (TCRs) between
?5ppm/癈 and ?00ppm/癈. How the sense resistor
changes as a function of temperature depends on the
I
2
" R power being dissipated by it. The power rating of the
sense resistor should accommodate steady-state fault
current levels so that the component is not damaged
before the circuit breaker trips.
Table 2 lists I
TRIP(MIN)
and I
TRIP(MAX)
versus some sug-
gested values of R
SENSE
. Table 7 lists manufacturers and
part numbers for these resistor values.
Table 2. I
TRIP
vs R
SENSE
R
SENSE
(1% RTOL)
I
TRIP(MIN)
I
TRIP(MAX)
0.005&
9.31A
11.5A
0.007&
6.6A
8.2A
0.011&
4.2A
5.2A
Output Voltage Monitor
The status of all four output voltages is monitored by the
power good function. In addition, the PCI_RST# signal is
logically combined on-chip with the HEALTHY# signal to
create LOCAL_PCI_RST# (see Table 3). As a result,
LOCAL_PCI_RST# will be pulled low whenever HEALTHY#
is pulled high independent of the state of the PCI_RST#
signal.
If any of the output voltages drop below the power good
threshold for more than 14祍, the PWRGD pin will be
pulled high and the LOCAL_PCI_RST# signal will be
asserted low.
Table 3. LOCAL_PCI_RST# Truth Table
PCI_RST#
HEALTHY#
LOCAL_PCI_RST#
LO
LO
LO
LO
HI
LO
HI
LO
HI
HI
HI
LO
Precharge
The PRECHARGE input and DRIVE output pins are in-
tended for use in generating the 1V precharge voltage that
is used to bias the bus I/O connector pins during board
insertion and extraction. The LTC4244 is also capable of
generating precharge voltages other than 1V. Figure 7
shows a circuit that can be used in applications requiring
a precharge voltage of less than 1V. The circuit in Figure 8
can be used for applications that need precharge voltages
greater than 1V.
Precharge resistors are used to connect the 1V bias volt-
age to the I/O lines with minimal disturbance. Figure 1
shows the precharge application circuit for 5V signaling.
The precharge resistor requirements are more stringent
for 3.3V and Universal Hot Swap boards. If the total leak-
age current on the I/O line is less 2礎, then a 50k resistor
can be connected directly from the 1V bias voltage to the
I/O line. However, many ICs connected to the I/O lines can
have leakage currents up to 10礎. For these applications,
a 10k resistor is used but must be disconnected when the
board is seated as determined by the state of the BD_SEL#
signal. Figure 9 shows a precharge circuit that uses a bus
switch to connect the individual 10k precharge resistors to
the LTC4244s 1V PRECHARGE pin. The electrical connec-
tion is made (bus switches closed) when the voltage on the
BD_SEL# pin of the plug-in card is pulled-up to 5V
IN
,
which occurs just after the long pins have made contact.
The bus switches are electrically disconnected when the
short, BD_SEL# connector pin makes contact and the
APPLICATIO S I FOR ATIO
U
U
U
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