参数资料
型号: LTC4245IG#TRPBF
厂商: Linear Technology
文件页数: 6/36页
文件大小: 431K
描述: IC CNTRLR HOT SWAP 36-SSOP
标准包装: 1,000
类型: 热交换控制器
应用: CompactPCI?
内部开关:
电源电压: 3.3V,5V,12V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 36-SSOP(0.209",5.30mm 宽)
供应商设备封装: 36-SSOP
包装: 带卷 (TR)
LTC4245
6
4245fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
SU, DAT(MIN)
Minimum Data Set-Up Time Input
0
100
ns
t
HD, DATI(MIN)
Minimum Data Hold Time Input
100
0
ns
t
HD, DATO(MIN)
Minimum Data Hold Time Output
300
500
900
ns
t
SP(MAX)
Maximum Suppressed Spike Pulse Width
50
110
250
ns
C
X
SCL, SDA Input Capacitance
5
10
pF
t
of
Data Output Fall Time
(Note 9)
20 + 0.1C
b
250
ns
 
The ?/SPAN> denotes the speci cations which apply over the full operating temperature
range, otherwise speci cations are at T
A
 = 25癈. V
12VIN
 = 12V, V
5VIN
 = 5V, V
3VIN
 = 3.3V, V
VEEIN
 = 12V, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings 
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device 
pins are negative. All voltages are referenced to GND unless otherwise
speci ed.
Note 3: The 5V
GATE
 and 3V
GATE
 pins should not be driven beyond the
lower of 12V
IN
 + 0.3V and 14V.
Note 4: An internal clamp limits the GATE pins to a minimum of 5V above 
V
OUT
 (V
EEIN
 for V
EEGATE
). Driving this pin to voltages beyond the clamp
may damage the device.
Note 5: The device pulls up the V
EEOUT
 pin to 0.6V when pin is in open state.
Note 6: UHF package speci  cation limits are identical to G package limits 
and guaranteed by design and by correlation to wafer test measurements.
Note 7: Guaranteed by design and not subject to test.
Note 8: Integral Nonlinearity is de  ned as the deviation of a code from a 
precise analog input voltage. Maximum speci cations are limited by the
LSB step size and the single shot measurement. Typical speci cations are
measured from 1/4, 1/2, 3/4 areas of the quantization band.
Note 9: C
b
 = total capacitance of one bus line in pF.
TI  I G DIAGRA    U
W
t
SU, DAT
t
SU, STO
t
SU, STA
t
BUF
t
HD, STA
t
SP
t
SP
t
HD, DATO,
t
HD, DATI
t
HD, STA
t
of
START
CONDITION
STOP
CONDITION
REPEATED START
CONDITION
START
CONDITION
SDA
SCL
4245 TDO1
ELECTRICAL CHARACTERISTICS
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