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参数资料
| 型号： | LTC4253ACGN-ADJ#TRPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 20; Temperature Range: 0°C to +70°C |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20 |
| 封装： | 0.150 INCH, LEAD FREE, PLASTIC, SSOP-20 |
| 文件页数： | 4/32页 |
| 文件大小： | 611K |
| 代理商： | LTC4253ACGN-ADJ#TRPBF |
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LTC4253A-ADJ
12
4253a-adjf
OPERATIO
U
If RESET < 0.8V occurs after the LTC4253A-ADJ comes
out of UVLO (interlock condition 1) and undervoltage
(interlock condition 2), GATE and SS are released without
an initial TIMER cycle once the other interlock conditions
are met (see Figure 13a). If not, TIMER begins the start-up
sequence by sourcing 5
A into CT. If VIN, UVL/UV or OVL/
OV falls out of range or RESET asserts, the start-up cycle
stops and TIMER discharges CT to less than 1V, then waits
until the aforementioned conditions are once again met. If
CT successfully charges to 4V, TIMER pulls low and both
SS and GATE pins are released. GATE sources 50
A
(IGATE), charging the MOSFET gate and associated capaci-
tance. The SS voltage ramp limits VSENSE to control the
inrush current. The SEL pin selects between two different
modes of SS ramp-up (refer to Applications Information,
Soft-Start section). SQTIMER starts its ramp-up when
GATE is within 2.8V of VIN and DRAIN is lower than VDRNL.
This sets off the power good sequence in which PWRGD1,
PWRGD2 and then PWRGD3 is subsequently pulled low
after a delay, adjustable through the SQTIMER capacitor
CSQ or by external control inputs EN2 and EN3. In this way,
external loads or power modules controlled by the three
PWRGD signals are turned on in a controlled manner
without overloading the power bus.
Two modes of operation are possible during the time the
MOSFET is first turned on, depending on the values of
external components, MOSFET characteristics and nomi-
nal design current. One possibility is that the MOSFET will
turn on gradually so that the inrush into the load capacitance
remains a low value. The output will simply ramp to – 48V
and the LTC4253A-ADJ will fully enhance the MOSFET. A
second possibility is that the load current exceeds the soft-
start current limit threshold of [VSS(t)/20 – VOS]/RS. In this
case the LTC4253A-ADJ will ramp the output by sourcing
soft-start limited current into the load capacitance. If the
soft-start voltage is below 1.2V, the circuit breaker TIMER
is held low. Above 1.2V, TIMER ramps up. It is important
to set the timer delay so that, regardless of which start-up
mode is used, the TIMER ramp is less than one circuit
breaker delay time. If this condition is not met, the
LTC4253A-ADJ may shut down after one circuit breaker
delay time.
Board Removal
When the board is withdrawn from the card cage, the UVL/
UV/OVL/OV divider is the first to lose connection. This
shuts off the MOSFET and commutates the flow of current
in the connector. When the power pins subsequently
separate there is no arcing.
Current Control
Three levels of protection handle short-circuit and over-
load conditions. Load current is monitored by SENSE and
resistor RS. There are three distinct thresholds at SENSE:
50mV for a timed circuit breaker function; 60mV for an
analog current limit loop; and 200mV for a fast, feedforward
comparator which limits peak current in the event of a
catastrophic short-circuit.
If, due to an output overload, the voltage drop across RS
exceeds 50mV, TIMER sources 200
A into CT. CT eventu-
ally charges to a 4V threshold and the LTC4253A-ADJ
shuts off. If the overload goes away before CT reaches 4V
and SENSE measures less than 50mV, CT slowly dis-
charges (5
A). In this way the LTC4253A-ADJ’s circuit
breaker function responds to low duty cycle overloads,
and accounts for the fast heating and slow cooling char-
acteristic of the MOSFET.
Higher overloads are handled by an analog current limit
loop. If the drop across RS reaches VACL, the current
limiting loop servos the MOSFET gate and maintains a
constant output current of VACL/RS. In current limit mode,
VOUT (MOSFET drain-source voltage drop) typically rises
and this increases MOSFET heating. If VOUT > VDRNCL,
connecting an external resistor, RD between VOUT and
DRAIN allows the fault timing cycle to be shortened by
accelerating the charging of the TIMER capacitor. The
TIMER pull-up current is increased by 8 IDRN. Note that
because SENSE > 50mV, TIMER charges CT during this
time, and the LTC4253A-ADJ will eventually shut down.
Low impedance failures on the load side of the LTC4253A-
ADJ coupled with 48V or more driving potential can
produce current slew rates well in excess of 50A/
s.Under
these conditions, overshoot is inevitable. A fast SENSE
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC4253ACUF-ADJ#PBF | 制造商:Linear Technology 功能描述:Hot Swap Controller 1-CH 20-Pin QFN EP |
| LTC4253ACUF-ADJ#TRPBF | 制造商:Linear Technology 功能描述:Hot Swap Controller 1-CH 20-Pin QFN EP T/R |
| LTC4253AIGN#PBF | 功能描述:IC HOT SWAP CONTRLR -48V 16-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 热交换 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:100 系列:- 类型:热插拔开关 应用:通用 内部开关:是 电流限制:可调 电源电压:9 V ~ 13.2 V 工作温度:-40°C ~ 150°C 安装类型:表面贴装 封装/外壳:10-WFDFN 裸露焊盘 供应商设备封装:10-TDFN-EP（3x3） 包装:管件 |
| LTC4253AIGN#TRPBF | 功能描述:IC HOT SWAP CONTRLR -48V 16-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 热交换 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:100 系列:- 类型:热插拔开关 应用:通用 内部开关:是 电流限制:可调 电源电压:9 V ~ 13.2 V 工作温度:-40°C ~ 150°C 安装类型:表面贴装 封装/外壳:10-WFDFN 裸露焊盘 供应商设备封装:10-TDFN-EP（3x3） 包装:管件 |
| LTC4253AIGN-ADJ | 制造商:LINER 制造商全称:Linear Technology 功能描述:-48V Hot Swap Controller with Sequencer |
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