参数资料
型号: LTC4253ACGN-ADJ#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 20; Temperature Range: 0°C to +70°C
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20
封装: 0.150 INCH, LEAD FREE, PLASTIC, SSOP-20
文件页数: 7/32页
文件大小: 611K
代理商: LTC4253ACGN-ADJ#TRPBF
LTC4253A-ADJ
15
4253a-adjf
APPLICATIO S I FOR ATIO
WU
U
Figure 2b shows the implementation of the overvoltage
function of the Typical Application. During UVLO, OVD is
forced high so OVL is multiplexed to OVIN. At time point
1, the part exits UVLO and the overvoltage comparator is
enabled. OVIN = OVL is less than VOVLO (5.08V) so OVD
goes low, switching OV to OVIN and bringing the part to
Normal mode. At time point 2, OV ramps past VOVHI
(5.09V) and OVD goes high, switching OVL to OVIN as well
as turning on the internal 10mV hysteresis as the part goes
into overvoltage. OVL is tied to OVIN until time point 3
when OVL ramps past VOVLO (5.09V – 10mV = 5.08V) and
OVD goes low, bringing the part into Normal mode and
switching OV to OVIN.
The undervoltage (UV) comparator has no internal hyster-
esis to preserve the accuracy of the hysteresis set across
UVL/UV while the overvoltage (OV) comparator has an
internal low to high hysteresis of 10mV. This will add to the
hysteresis set across OVL/OV and provide some noise
immunity if OVL/OV is shorted together. Any implementa-
tion must ensure that VUVL ≥ VUV and VOVL ≥ VOV under all
conditions.
The various thresholds to note are:
UV low-to-high (VUVHI) = 3.08V
UVL high-to-low (VUVLO) = 3.08V
OV low-to-high (VOVHI) = 5.09V
OVL high-to-low (VOVLO) = 5.08V
Using these thresholds and an external resistive divider,
any required supply operating range can be implemented.
An example is shown in Figure 1 where the required typical
operating range is:
Undervoltage low-to-high (V48UVHI) = 43V
Undervoltage high-to-low (V48UVLO) = 39V
Overvoltage low-to-high (V48OVHI) = 82V
Overvoltage high-to-low (V48OVLO) = 78V
A quick check of the resistive divider ratios required at
UVL, UV, OVL and OV confirms that UVL is tapped
between R5/R4, UV is tapped between R4/R3, OVL is
tapped between R3/R2 and OV is tapped between R2/R1.
From Figure 1, by looking at the voltages at OV, OVL, UV
and UVL, the following equations are obtained:
R
V
where
R
RRR
R
RV
V
TOTAL
OVHI
TOTAL
OVHI
1
12
3
4
5
1
48
=
+++
+
()
=
:
(1a)
R
RR
V
RR
V
R
TOTAL
OVLO
OVHI
12
21
1
48
+
=
=
(1b)
R
RR
R
V
RR
V
RR
TOTAL
UVHI
OVHI
12
3
31
1
2
48
++
=
=
(1c)
R
RRR
V
RR
V
RR
R
TOTAL
UVLO
OVHI
12
3
4
41
1
2
3
48
+++
=
=
(1d)
Starting with a value of 20k for R1, Equation 1b gives R2
= 0.984k (use closest 1% standard value of 0.976k). Using
R1 = 20k and R2 = 0.976k, Equation 1c gives R3 = 2.103k
(use the closest 1% standard value of 2.1k). Using R1 =
20k, R2 = 0.976k and R3 = 2.1k, Equation 1d gives R4 =
2.37k (use closest 1% standard value of 2.37k). Using R1
= 20k, R2 = 0.976k, R3 = 2.1k and R4 = 2.37k in Equation
1a, R5 = 296.754k (use 1% standard values of 294k in
series with 2.74k).
The divider values shown set a standing current of slightly
more than 150
A and define an impedance at UVL/UV/
OVL/OV of approximately 20k. This impedance will work
with the hysteresis set across UVL/UV and OVL/OV to
provide noise immunity to the UV and OV comparators. If
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LTC4253ACUF-ADJ#PBF -48V Hot Swap Controller with Sequencer; Package: QFN; No of Pins: 20; Temperature Range: 0°C to +70°C
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