参数资料
型号: LTC4253ACGN#PBF
厂商: Linear Technology
文件页数: 17/34页
文件大小: 383K
描述: IC HOT SWAP CONTRLR -48V 16-SSOP
标准包装: 100
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: 8.2 V ~ 14.5 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-SSOP
包装: 管件
LTC4253/LTC4253A
17
425353aff
For more information www.linear.com/4253
APPLICATIONS INFORMATION
TIMER
The operation of the TIMER pin is somewhat complex as
it handles several key functions. A capacitor C
T
 is used
at TIMER to provide timing for the LTC4253/LTC4253A.
Four different charging and discharging modes are avail-
able at TIMER:
1. 5礎 slow charge; initial timing delay.
2. (200礎???營
DRN
) fast charge; circuit breaker delay.
3. 5礎 slow discharge; circuit breaker cool-off.
4. Low impedance switch; resets the TIMER capacitor after
an initial timing delay, in UVLO, in UV and in OV during
initial timing and when RESET is high.
For initial timing delay, the 5礎 pull-up is used. The
low impedance switch is turned off and the 5礎 current
source is enabled when the interlock conditions are met.
C
T
 charges to 4V in a time period given by:
 
t=
4V  C
T
5礎
 
(2)
When C
T
 reaches V
TMRH
 ( 4V), the low impedance switch
turns on and discharges C
T
. A GATE start-up cycle begins
and both SS and GATE outputs are released.
CIRCUIT BREAKER TIMER OPERATION
If the SENSE pin detects more than 50mV drop across R
S
,
the TIMER pin charges C
T
 with (200礎???營
DRN
). If C
T
 
charges to 4V , the GATE pin pulls low and the LTC4253/
LTC4253A latch off. The LTC4253/LTC4253A remain
latched off until the RESET pin is momentarily pulsed
high, the UV pin is momentarily pulsed low, the TIMER
pin is momentarily discharged low by an external switch
or V
IN
 dips below UVLO and is then restored. The circuit
breaker timeout period is given by:
 
t=
4V  C
T
200礎 +8  I
DRN
 
(3)
If V
OUT
 < 5V , an internal PMOS isolates DRAIN pin leakage
current and this makes I
DRN
 = 0 in Equation (3). If V
OUT
 is
above V
DRNCL
 during the circuit breaker fault period, the
charging of C
T
 is accelerated by 8 " I
DRN
 of Equation (1).
Intermittent overloads may exceed the 50mV threshold at
SENSE but, if their duration is sufficiently short, TIMER will
not reach 4V and the LTC4253/LTC4253A will not shut the
external MOSFET off. To handle this situation, the TIMER
discharges C
T
 slowly with a 5礎 pull-down whenever the
SENSE voltage is less than 50mV . Therefore, any intermit-
tent overload with V
OUT
 < 5V and an aggregate duty cycle
of more than 2.5% will eventually trip the circuit breaker
and shut down the LTC4253/LTC4253A. Figure 4 shows
the circuit breaker response time in seconds normalized
to 1礔 . The asymmetric charging and discharging of C
T
 is
a fair gauge of MOSFET heating.
The normalized circuit response time is estimated by:
 
t
C
T
(礔)
=
4
205+8  I
DRN
(
)
D5
?/DIV>
?/DIV>
?/DIV>
?/DIV>
for D>2.5%
 
(4)
FAULT DUTY CYCLE, D (%)
20
40
60
80
0
10
1
0.1
0.01
100
4253 F04
t
C
T
(礔)
4
(205 + 8 " I
DRN
) " D  5
=
I
DRN
 = 0礎
Figure 4. Circuit Breaker Response Time
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