参数资料
型号: LTC6800HDD#TRPBF
厂商: Linear Technology
文件页数: 13/14页
文件大小: 0K
描述: IC OP AMP INSTR R-R I/O 8-DFN
标准包装: 2,500
放大器类型: 仪表
电路数: 1
输出类型: 满摆幅
转换速率: 0.2 V/µs
增益带宽积: 200kHz
电流 - 输入偏压: 4nA
电压 - 输入偏移: 100µV
电流 - 电源: 1.3mA
电压 - 电源,单路/双路(±): 2.7 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-DFN-EP(3x3)
包装: 带卷 (TR)
LTC6800
6800fb
block DiagraM
applicaTions inForMaTion
Theory of Operation
The LTC6800 uses an internal capacitor (CS) to sample
a differential input signal riding on a DC common mode
voltage (see the Block Diagram). This capacitor’s charge is
transferred to a second internal hold capacitor (CH) trans-
lating the common mode of the input differential signal to
that of the REF pin. The resulting signal is amplified by a
zero-drift op amp in the noninverting configuration. The
RG pin is the negative input of this op amp and allows
external programmability of the DC gain. Simple filtering
can be realized by using an external capacitor across the
feedback resistor.
Input Voltage Range
The input common mode voltage range of the LTC6800
is rail-to-rail. However, the following equation limits the
size of the differential input voltage:
V≤ (V+IN – V–IN) + VREF ≤ V+ – 1.3
Where V+IN and V–IN are the voltages of the +IN and –IN
pins, respectively, VREF is the voltage at the REF pin and
V+ is the positive supply voltage.
For example, with a 3V single supply and a 0V to 100mV
differential input voltage, VREF must be between 0V and
1.6V.
Settling Time
The sampling rate is 3kHz and the input sampling period
during which CS is charged to the input differential voltage
VIN is approximately 150s. First assume that on each
input sampling period, CS is charged fully to VIN. Since
CS = CH (= 1000pF), a change in the input will settle to
N bits of accuracy at the op amp noninverting input after
N clock cycles or 333s(N). The settling time at the OUT
pin is also affected by the settling of the internal op amp.
Since the gain bandwidth of the internal op amp is typically
200kHz, the settling time is dominated by the switched
capacitor front end for gains below 100 (see the Typical
Performance Characteristics section).
+
CH
OUT
6800 BD
4
V
5
REF
6
RG
8
V+
3
+IN
2
–IN
CS
7
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