参数资料
| 型号： | LTC6902IMS#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC OSC SILICON 20MHZ 10MSOP |
| 标准包装： | 50 |
| 类型： | 振荡器 - 硅 |
| 频率： | 100kHz ~ 20MHz |
| 电源电压： | 2.7 V ~ 5.5 V |
| 电流 - 电源： | 2.5mA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 管件 |
| 供应商设备封装： | 10-MSOP |
| 安装类型： | 表面贴装 |
LTC6902
5
6902f
Output Operating at 20MHz,
VS = 5V
1V/DIV
12.5ns/DIV
69012 G06
1V/DIV
25ns/DIV
69012 G07
V+ = 5V, RSET = 10k, CL = 10pF
V+ = 3V, RSET = 20k, CL = 10pF
Output Operating at 10MHz,
VS = 3V
0V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
QUICK DESIG GUIDE
U
Step 1. Select Multiphase Mode, Setting M
By selecting the multiphase mode, a division parameter M
is also chosen:
2-Phase: Connect PH Pin to GND
M = 1
3-Phase: Leave PH Open
M = 3
4-Phase: Connect PH Pin to V+
M = 4
Step 2. Choosing Programmable Divider Setting N
A. For applications using spread spectrum frequency
modulation (SSFM) or applications that are constant fre-
quency where low clock jitter is the primary specification:
DIVIDER SETTING
FREQUENCY RANGE (fOUT M)
N = 1
Connect DIV Pin to GND
2MHz to 20MHz
N = 10
Leave DIV Open
200kHz to 2MHz
N = 100
Connect DIV Pin to V+
< 200kHz
Note: The frequency range numbers are for a 5V supply where a 20MHz
output is the maximum frequency supported. For low supply applications
(2.7V
≤ V+ ≤ 4V), the maximum rated output frequency is 10MHz and all
of the above numbers should be halved.
B. For constant frequency applications where frequency
accuracy is the primary specification:
DIVIDER SETTING
FREQUENCY RANGE (fOUT M)
N = 1
Connect DIV Pin to GND
> 500kHz*
N = 10
Leave DIV Open
50kHz to 500kHz
N = 100
Connect DIV Pin to V+
< 50kHz
*The maximum frequency (fOUT M) is 20MHz for 5V applications and is
10MHz for low supply applications (2.7V
≤ V+ ≤ 4V).
f
MHz
NM
k
R
kHz
f
MHz
Spreading Percentage
R
OUT
SET
OUT
SET
MOD
=
≤≤
=
10
20
520
20
;
V+
DIV
PH
OUT1
OUT2
OUT4
OUT3
OUT2
OUT1
SET
MOD
GND
OUT4
OUT3
LTC6902
RSET
RMOD
V+
DIV
PH
6902 F01
0.1
F
Figure 1. Typical Application with Design Equation
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