参数资料
型号: LTC6911CMS-1#PBF
厂商: Linear Technology
文件页数: 4/20页
文件大小: 0K
描述: IC PGA DIGITAL R-R DUAL 10MSOP
标准包装: 50
放大器类型: 可编程增益
电路数: 2
输出类型: 满摆幅
转换速率: 16 V/µs
增益带宽积: 11MHz
电压 - 输入偏移: 2000µV
电流 - 电源: 3.1mA
电流 - 输出 / 通道: 35mA
电压 - 电源,单路/双路(±): 2.7 V ~ 10.5 V,±2.7 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 管件
LTC6911-1/LTC6911-2
12
sn691112 691112fs
UU
U
PI FU CTIO S
INA (Pin 1): Analog Input. The input signal to the A channel
amplifier of the LTC6911-X is the voltage difference be-
tween the INA and AGND pin. The INA pin connects
internally to a digitally controlled resistance whose other
end is a current summing point at the same potential as the
AGND pin (Figure 1). At unity gain (digital input 001), the
value of this input resistance is approximately 10k
and
the INA pin voltage range is rail-to-rail (V+ to V). At gain
settings above unity, the input resistance falls. The linear
input range at INA also falls inversely proportional to the
programmed gain. Tables 1 and 2 summarize this behav-
ior. The higher gains are designed to boost lower level
signals with good noise performance. In the “zero” gain
state (digital input 000), analog switches disconnect the
INA pin internally and this pin presents a very high input
resistance. The input may vary from rail to rail in the “zero”
gain setting, but the output is insensitive to it and is forced
to the AGND potential.
Circuitry driving the INA pin must consider the LTC6911-X’s
input resistance, its lot-to-lot variance, and the variation of
this resistance from gain setting to gain setting. Signal
sources with significant output resistance may introduce
a gain error as the source’s output resistance and the
LTC6911-X’s input resistance form a voltage divider. This
is especially true at higher gain settings where the input
resistance is the lowest.
In single supply voltage applications, it is important to
remember that the LTC6911-X’s DC ground reference for
both input and output is AGND, not V. With increasing
gains, the LTC6911-X’s input voltage range for an unclipped
output is no longer rail-to-rail but diminishes inversely to
gain, centered about the AGND potential.
Figure 1. Block Diagram
+
INPUT R ARRAY
FEEDBACK R ARRAY
OUTA
MOS-INPUT
OP AMP
MOS-INPUT
OP AMP
INA
G1
G2
G0
10
V
9
V+
691112 F01
7
+
OUTB
8
1
INPUT R ARRAY
FEEDBACK R ARRAY
INB
3
AGND
V+
V
10k
2
CMOS LOGIC
5
6
4
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