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参数资料
| 型号： | LTC693CS#TRPBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封装： | 0.300 INCH, PLASTIC, SOP-16 |
| 文件页数： | 3/20页 |
| 文件大小： | 244K |
| 代理商： | LTC693CS#TRPBF |
LTC692/LTC693
11
0692fb
If battery connections are made through long wires, a
10Ω to 100Ω series resistor and a 0.1μF capacitor are
recommended to prevent any overshoot beyond VCC due
to the lead inductance (Figure 4).
Table 1 shows the state of each pin during battery backup.
When the battery switchover section is not used, connect
VBATT to GND and VOUT to VCC.
battery backed up CMOS RAM. CE OUT can also be used
to drive the Store or Write input of an EEPROM, EAROM
or NOVRAM to achieve similar protection. Figure 5 shows
the timing diagram of CE IN and CE OUT.
CE IN can be derived from the microprocessor’s address
decoder output. Figure 6 shows a typical nonvolatile CMOS
RAM application.
Memory protection can also be achieved with the LTC692
by using RESET as shown in Figure 7.
APPLICATIONS INFORMATION
3.9M
0.1μF
VBATT
LTC692
LTC693
GND
692_3 F04
10Ω
Figure 4. 10Ω/0.1μF Combination Eliminates Inductive
Overshoot and Prevents Spurious Resets During Battery
Replacement
Table 1. Input and Output Status in Battery Backup Mode
SIGNAL
STATUS
VCC
C2 monitors VCC for active switchover
VOUT
VOUT is connected to VBATT through an internal PMOS switch
VBATT
The supply current is 1μA maximum
BATT ON
Logic high. The open-circuit output voltage is equal to VOUT
PFI
Power failure input is ignored
PFO
Logic low
RESET
Logic low
RESET
Logic high. The open-circuit output voltage is equal to VOUT
LOW LINE Logic low
WDI
Watchdog input is ignored
WDO
Logic high. The open-circuit output voltage is equal to VOUT
CE IN
Chip Enable input is ignored
CE OUT
Logic high. The open-circuit output voltage is equal to VOUT
OSC IN
OSC IN is ignored
OSC SEL
OSC SEL is ignored
Memory Protection
The LTC693 includes memory protection circuitry which
ensures the integrity of the data in memory by preventing
write operations when VCC is at an invalid level. Two ad-
ditional pins, CE IN and CE OUT, control the Chip Enable
or Write inputs of CMOS RAM. When VCC is 5V, CE OUT
follows CE IN with a typical propagation delay of 20ns.
When VCC falls below the reset voltage threshold or VBATT,
CE OUT is forced high, independent of CE IN. CE OUT is
an alternative signal to drive the CE, CS, or Write input of
VCC
V1
CE IN
VOUT = VBATT
CE OUT
VOUT = VBATT
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
692_3 F05
Figure 5. Timing Diagram for CE IN and CE OUT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC693CSW | 功能描述:IC MPU SUPERVISRY CIRCUIT 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 其它有关文件:STM6717 View All Specifications 标准包装:1 系列:- 类型:多压监控器 监视电压数目:2 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:1.11V，3.075V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 产品目录页面:1194 (CN2011-ZH PDF) 其它名称:497-7019-6 |
| LTC693CSW#PBF | 功能描述:IC MPU SUPERVISRY CIRCUIT 16SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 其它有关文件:STM6717 View All Specifications 标准包装:1 系列:- 类型:多压监控器 监视电压数目:2 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:1.11V，3.075V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 产品目录页面:1194 (CN2011-ZH PDF) 其它名称:497-7019-6 |
| LTC693CSW#TR | 功能描述:IC SUPERVISORY CIRC MPU 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
| LTC693CSW#TRPBF | 功能描述:IC MPU SUPERVISRY CIRCUIT 16SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
| LTC693I | 制造商:LINER 制造商全称:Linear Technology 功能描述:Microprocessor Supervisory Circuits |
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