参数资料
型号: LTC693CS#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16
封装: 0.300 INCH, PLASTIC, SOP-16
文件页数: 4/20页
文件大小: 244K
代理商: LTC693CS#TRPBF
LTC692/LTC693
12
0692fb
Power-Fail Warning
The LTC692/LTC693 generate a power failure output
(PFO) for early warning of failure in the microprocessor’s
power supply. This is accomplished by comparing the
power failure input (PFI) with an internal 1.3V reference.
PFO goes low when the voltage at the PFI pin is less than
1.3V. Typically PFI is driven by an external voltage divider
(R1 and R2 in Figures 8 and 9) which senses either an
unregulated DC input or a regulated 5V output. The volt-
age divider ratio can be chosen such that the voltage at
the PFI pin falls below 1.3V, several milliseconds before
the 5V supply falls below the maximum reset voltage
threshold of 4.50V. PFO is normally used to interrupt the
microprocessor to execute shutdown procedure between
PFO and RESET or RESET.
APPLICATIONS INFORMATION
5V
3V
0.1μF
10μF
VBATT
VCC
LTC693
VOUT
GND
692_3 F06
VCC
RESET
CE IN
CE OUT
RESET
0.1μF
TO μP
FROM DECODER
CS
20ns PROPAGATION DELAY
62512
RAM
GND
+
5V
3V
0.1μF
10μF
VBATT
VCC
LTC692
VOUT
GND
692_3 F07
VCC
RESET
0.1μF
CS
62128
RAM
CS1
CS2
GND
+
Figure 6. A Typical Nonvolatile CMOS RAM Application
Figure 7. Write-Protect for RAM with the LTC692
The power-fail comparator, C3, does not have hysteresis.
Hysteresis can be added however, by connecting a resistor
between the PFO output and the noninverting PFI input
pin as shown in Figures 8 and 9. The upper and lower trip
points in the comparator are established as follows:
When PFO output is low, R3 sinks current from the sum-
ming junction at the PFI pin.
V = 1.3V 1+
R1
R2
R1
R3
H
+
When PFO output is high, the series combination of R3
and R4 source current into the PFI summing junction.
V
1.3V 1
R1
R2
(5V – 1.3V)R1
1.3V(R3 R4)
L =+
+
AsssumingR4
R3,V
5V
R1
R3
HYSTERESIS
<<
=
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LTC693I 制造商:LINER 制造商全称:Linear Technology 功能描述:Microprocessor Supervisory Circuits