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| 型号： | LTM8048EY#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC DC/DC UMODULE LDO BGA |
| 产品培训模块： | LTM8047 and LTM8048 1.5W, 725 VDC Isolated Micromodule Converter |
| 标准包装： | 168 |
| 系列： | µModule® |
| 类型： | 隔离 |
| 输出数： | 2 |
| 电压 - 输入（最小）： | 3.1V |
| 电压 - 输入（最大）： | 32V |
| Voltage - Output 1： | 2.5 ~ 13 V |
| Voltage - Output 2： | 1.2 ~ 12 V |
| 电流 - 输出（最大）： | 440mA，300mA |
| 电压 - 隔离： | 725V |
| 特点： | 带有 UVLO |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 45-BGA |
| 尺寸/尺寸： | 0.44" L x 0.35" W x 0.19" H（11.3mm x 9.0mm x 4.9mm） |
| 包装： | 托盘 |
| 工作温度： | -40°C ~ 125°C |
LTM8048
PIN FUNCTIONS
V OUT1 (Bank 1): V OUT1 and V OUT– comprise the isolated
output of the LTM8048 flyback stage. Apply an external
capacitor between V OUT1 and V OUT– . Do not allow V OUT–
to exceed V OUT1 .
V OUT– (Bank 2): V OUT– is the return for both V OUT1 and
V OUT2 . V OUT1 and V OUT– comprise the isolated output of
the LTM8048. In most applications, the bulk of the heat
flow out of the LTM8048 is through the GND and V OUT–
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
Apply an external capacitor between V OUT1 and V OUT– .
V OUT2 (Bank 3): The output of the secondary side linear
post regulator. Apply the load and output capacitor between
V OUT2 and V OUT– . See the Applications Information section
for more information on output capacitance and reverse
output characteristics.
GND (Bank 4): This is the primary side local ground of the
LTM8048 primary. In most applications, the bulk of the heat
flow out of the LTM8048 is through the GND and V OUT–
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
V IN (Bank 5): V IN supplies current to the LTM8048’s inter-
nal regulator and to the integrated power switch. These
pins must be locally bypassed with an external, low ESR
capacitor.
ADJ2 (pin A2): This is the input to the error amplifier of the
secondary side LDO post regulator. This pin is internally
clamped to ±7V. The ADJ2 pin voltage is 1.22V referenced
to V OUT– and the output voltage range is 1.22V to 12V. Ap-
ply a resistor from this pin to V OUT– , using the equation
R ADJ2 = 608.78/(V OUT2 – 1.22)k?. If the post regulator
is not used, leave this pin floating.
BYP (Pin B2): The BYP pin is used to bypass the refer-
ence of the LDO to achieve low noise performance from
the linear post regulator. The BYP pin is clamped internally
to ±0.6V relative to V OUT– . A small capacitor from V OUT2
to this pin will bypass the reference to lower the output
voltage noise. A maximum value of 0.01μF can be used
for reducing output voltage noise to a typical 20μV RMS
over a 100Hz to 100kHz bandwidth. If not used, this pin
must be left unconnected.
RUN (Pin F3): A resistive divider connected to V IN and this
pin programs the minimum voltage at which the LTM8048
will operate. Below 1.24V, the LTM8048 does not deliver
power to the secondary. Above 1.24V, power will be de-
livered to the secondary and 10μA will be fed into the SS
pin. When RUN is less than 1.24V, the pin draws 2.5μA,
allowing for a programmable hysteresis. Do not allow a
negative voltage (relative to GND) on this pin.
ADJ1 (Pins G7): Apply a resistor from this pin to GND to
set the output voltage V OUT1 relative to V OUT– , using the
recommended value given in Table 1. If Table 1 does not
list the desired V OUT1 value, the equation
R ADJ1 = 28.4 ( V OUT1 –0.879 ) k ?
may be used to approximate the value. To the seasoned
designer, this exponential equation may seem unusual. The
equation is exponential due to non-linear current sources
that are used to temperature compensate the regulation.
BIAS (Pin H5): This pin supplies the power necessary to
operate the LTM8048. It must be locally bypassed with a
low ESR capacitor of at least 4.7μF. Do not allow this pin
voltage to rise above V IN .
SS (Pin H6): Place a soft-start capacitor here to limit inrush
current and the output voltage ramp rate. Do not allow a
negative voltage (relative to GND) on this pin.
8048ff
For more information www.linear.com/LTM8048
7
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相关代理商/技术参数 |
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| LTM8048IY#PBF | 功能描述:IC DC/DC UMODULE LDO BGA RoHS:是 类别:电源 - 板载 >> DC DC Converters 系列:µModule® 设计资源:VI-200, VI-J00 Design Guide, Appl Manual 标准包装:1 系列:* 类型:隔离 输出数:1 电压 - 输入（最小）:100V 电压 - 输入（最大）:200V Voltage - Output 1:7.5V Voltage - Output 2:- Voltage - Output 3:- 电流 - 输出（最大）:* 电源（瓦） - 制造商系列:100W 电压 - 隔离:* 特点:* 安装类型:通孔 封装/外壳:9-SlimMod 尺寸/尺寸:4.60" L x 1.80" W x 0.52" H（116.8mm x 45.7mm x 13.2mm） 包装:散装 工作温度:-25°C ~ 85°C 效率:* 电源（瓦特）- 最大:* |
| LTM8048IY#PBF | 制造商:Linear Technology 功能描述:DC/DC CONVERTER ISOLATED FB UMODULE BG |
| LTM8048MPY#PBF | 功能描述:IC DC/DC UMODULE LDO BGA RoHS:是 类别:电源 - 板载 >> DC DC Converters 系列:µModule® 设计资源:VI-200, VI-J00 Design Guide, Appl Manual 3D 型号:VI-Jxx-xx-F4.stp VI-Jxx-xx-F4.pdf 标准包装:1 系列:* 类型:隔离 输出数:1 电压 - 输入（最小）:18V 电压 - 输入（最大）:36V Voltage - Output 1:28V Voltage - Output 2:- Voltage - Output 3:- 电流 - 输出（最大）:* 电源（瓦） - 制造商系列:25W 电压 - 隔离:* 特点:* 安装类型:通孔 封装/外壳:9 针半砖 FinMod 尺寸/尺寸:2.28" L x 1.86" W x 1.04" H（57.9mm x 47.2mm x 26.4mm） 包装:散装 工作温度:-10°C ~ 100°C 效率:* 电源（瓦特）- 最大:* |
| LTM8048MPY#PBF | 制造商:Linear Technology 功能描述:DC/DC CONVERTER ISOLATED FB UMODULE BG 制造商:Linear Technology 功能描述:DC/DC CONVERTER, ISOLATED FB UMODULE, BG |
| LTM8050EY#PBF | 制造商:Linear Technology 功能描述:DC/DC CONVERTER 0.8-24V 48W 制造商:Linear Technology 功能描述:BUCK UMODULE 58VIN 2A 2.4M 制造商:Linear Technology 功能描述:BUCK, UMODULE, 58VIN, 2A, 2.4MHZ, BGA-70 制造商:Linear Technology 功能描述:DC-DC REGULATOR, BUCK, ADJ, BGA-70, Primary Input Voltage:58V, No. of Outputs:1, 制造商:Linear Technology 功能描述:DC-DC REGULATOR, BUCK, ADJ, BGA-70, Primary Input Voltage:58V, No. of Outputs:1, Output Current:2A, No. of Pins:70, Operating Temperature Min:-40C, Operating Temperature Max:125C, MSL:MSL 3 - 168 hours, Package / Case:70-BGA , RoHS Compliant: Yes |
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