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参数资料
| 型号： | LX1661CD-TR |
| 厂商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分类： | 稳压器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, PDIP16 |
| 封装： | LEAD FREE, PLASTIC, DIP-16 |
| 文件页数： | 12/15页 |
| 文件大小： | 376K |
| 代理商： | LX1661CD-TR |
A D V ANCED PWM C ONTROLLER
LX1660/1661
PRODUCT DA T ABOOK 1996/1997
Copyright 1998
Rev. 1.1a 10/25/2004
6
P RODUCTION D ATA S HEET
Figure 2 — LX1660 / 1661 General Circuit Configuration
ENABLE
V
FB
V
CONTROL
EN
INV
NINV
HICCUP
C
T
CS-
A
B
V
REF
C
HICCUP
RR
C
Q
2
Q
1
+V
CC
+V
C
LR
S
V
FB
(LX1661)
CS+
CS-
C
OUT
LOAD
To R
S
C
T
TDRV
BDRV
CS+
C
2V
V
FB
(LX1660)
THEOR Y OF OPERATION
IC OPERATION
Referring to the block diagram and typical application circuit, the
output turns ON the top MOSFET, allowing the inductor current
to increase. At the error comparator threshold, the PWM latch is
reset, the top MOSFET turns OFF and the synchronous MOSFET
turns ON. The OFF-time capacitor C
T is now allowed to discharge.
At the valley voltage, the synchronous MOSFET turns OFF and the
top MOSFET turns on.
A special break-before-make circuit
prevents simultaneous conduction of the two MOSFETs.
To minimize frequency variation with varying output voltage,
the OFF-time is modulated as a function of the voltage at the OT
ADJ
pin. The OT
ADJ pin is also being monitored for a minimum voltage
of 0.7V. Below 0.7V the controller will shut down. A low voltage
at the EN pin or the OT
ADJ pin will put the controller in a sleep
mode. During the sleep mode the NINV pin is pulled low. This
discharges the external bypass capacitor on this pin and allows for
a soft-start.
Regulation
LX1660 Only: The INV pin is connected to the negative side
of the sense resistor (i.e. the actual voltage supplied to the
load) — See Figure 2. The LX1660 will achieve a high DC set-
point accuracy, since it regulates at the load, but it will have
greater transient voltage over- and under-shoots than the LX1661.
LX1661 Only: The INV pin is connected to the positive side of
the sense resistor (between the inductor and the sense resistor)
— See Figure 2. The LX1661 has a 40mV offset to the NINV pin
to enhance transient response, as shown in Figure 3 below.
s The peak voltage at the V
FB pin is 40mV higher than the set
voltage and its average is the peak voltage minus the ripple volt-
age at V
FB pin.
s The output voltage is the voltage at the V
FB pin minus the voltage
drop across the current sensing resistor (I * R
SENSE).
s At light loads, the voltage drop across the sensing resistor is small;
hence, the output voltage is approximately the voltage at the V
FB
pin (approximately 40mV higher than the nominal set-point volt-
age, V
SET).
s At heavy loads, larger current flows in the sense resistor, there-
fore, the voltage drop is higher and the output voltage is lower.
This adaptive positioning of the output voltage as the load
changes allows a greater output voltage excursion during a fast
step-load transient and requires fewer output capacitors to meet
the transient-response specification.
Figure 3 — Adaptive Voltage Positioning
Steady-state output voltage
at low current ~40mV
above nominal set-point
Nominal set-point
voltage, V
SET
Voltage drop (mainly) due
to current change and ESR
of capacitors,
V = I * ESR
(Effects of ESL ignored
in this analysis)
Load current
Output voltage
(V
OUT)
Steady-state voltage at
high current is approximately
V
SET + 40mV - I * RSENSE
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| LX1660CD-TR | 1.5 A SWITCHING CONTROLLER, PDSO16 |
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| LX1671-CPWTR | 1 A SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO38 |
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