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参数资料
| 型号： | LX1677CPW-TR |
| 厂商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分类： | 稳压器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, 1100 kHz SWITCHING FREQ-MAX, PDSO38 |
| 封装： | ROHS COMPLIANT, PLASTIC, TSSOP-38 |
| 文件页数： | 11/16页 |
| 文件大小： | 320K |
| 代理商： | LX1677CPW-TR |
LX1677
PRODUCTION DATA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 4
WWW
.Microse
m
i
.CO
M
AMD64 Processor VRM Controller
Copyright
2000
Rev 1.1, 2003-03-03
TM
ELECTRI CAL CHA RACTERI S TI CS
Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C
≤ TA ≤ 70°C except where
otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VIN = 12V, Switching Frequency = 500KHz.
LX1677
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
REGULATOR
ENA = VCC, FB+ = FB-
1
5
9
mA
IC Supply Current
IQ(VCC)
ENA = GND
1
A
Low Side Driver Operating
Current
IQ(VCCL)
ENA = VCC, FB+ = FB-
0.5
1
mA
High Side Driver Operating
Current
IQ(VCx)
ENA = VCC, FB+ = FB-
2
4
mA
ERROR AMPLIFIER: PHASE 1
Input Offset Voltage
VOS
Common Mode Voltage (VCM) = 1.4V
-6
6
mV
Input Bias Current
IEA1
-100
100
nA
DC Open Loop Gain
60
70
dB
Input Common Mode Range
VICM
CMRR > 50dB
0.8
2.5
V
VEO1(MAX)
IEA1 = 2mA
4.0
Output Voltage Swing
VEO1(MIN)
IEA1 = -20A
0.15
0.5
V
Unity Gain Bandwidth
UGBW
20
MHz
DIFFERENTIAL AMPLIFIER
Input Offset Voltage
VOS
VCM=1.4V
-6
6
mV
Gain
ADA
0.99
1
1.01
V/V
Common Mode Rejection Ratio
CMRRDA
0.8V < VCM < 2.5V
65
dB
Input Resistance
RIN
Measured at FB+ Input
30
K
Input Common Mode Range
VCM
0
3
V
Source / Sink Current
VDFOUT = 0V
5
mA
VDFOUT(MAX) IDFOUT = 2mA
4.0
Output Voltage Swing
VDFOUT (MIN) IEA1 = -20A
0.2
V
Unity Gain Bandwidth
UGBW
10
MHz
Slew Rate
SR
5
V/
s
OSCILLATOR
Maximum Clock Frequency
fMAX
RPWM=10k
0.9
1
1.1
MHz
Minimum Clock Frequency
fMIN
RPWM=50k
150
200
220
KHz
Frequency Stability
4
%
PWM OUTPUT
During Transient Correction Switching
100
Maximum Duty Cycle
DCMAX
Transient Correction Not Switching
40
50
%
Minimum Pulse Width
tPWM(MIN)
3000pF Load
60
nS
Dead Time
3000pF Load at 50% of VCCL
50
80
200
nS
VIN = 6V
0.70
VIN = 12
1.40
Ramp Amplitude
VRAMP
VIN = 24V
2.80
V
PHASE 2 INTEGRATING AMPLIFIER
Input Offset Voltage
VOS
VCM=1.4V
-6
6
mV
DC Open Loop Gain
70
dB
VEO2(MAX)
IEA2 = 2mA
4.0
Output Voltage Swing
VEO2(MIN)
IEA2 = -20A
0.15
0.5
V
Unity Gain Bandwidth
UGBW
20
MHz
EE
LL
EE
CC
TT
RR
IICC
AA
LL
SS
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