参数资料
型号: LXT363PE
英文描述: PCM TRANSCEIVER|SINGLE|T-1(DS1)|CMOS|LDCC|28PIN|PLASTIC
中文描述: 的PCM收发器|单|的T 1(DS1的)|的CMOS | LDCC | 28脚|塑料
文件页数: 41/52页
文件大小: 1187K
代理商: LXT363PE
Integrated T1/E1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
LXT361
Datasheet
41
Transmit clock tolerance
TCLKt
±100
ppm
Transmit clock duty cycle
TCLKd
10
90
%
TPOS/TNEG to TCLK setup time
t
SUT
50
ns
TCLK to TPOS/TNEG hold time
t
HT
50
ns
Table 30. Master and Transmit Clock Timing Characteristics for E1 Operation
(See Figure 14)
Parameter
Sym
Min
Typ
1
Max
Unit
Notes
Master clock frequency
MCLK
2.048
MHz
must be supplied
Master clock tolerance
MCLKt
±50
ppm
Master clock duty cycle
MCLKd
40
60
%
Transmit clock frequency
TCLK
2.048
MHz
Transmit clock tolerance
TCLKt
±100
ppm
Transmit clock duty cycle
TCLKd
10
90
%
TPOS/TNEG to TCLK setup time
t
SUT
50
ns
TCLK to TPOS/TNEG hold time
t
HT
50
ns
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
Figure 14. Transmit Clock Timing
Table 29. Master and Transmit Clock Timing Characteristics for T1 Operation
(See Figure 14)
Parameter
Sym
Min
Typ
1
Max
Unit
Notes
1. Typical figures are at 25
°
C and are for design aid only; not guaranteed and not subject to production testing.
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