- 您现在的位置：买卖IC网 > PDF目录149418 > M1010-01-155.5200 (INTEGRATED DEVICE TECHNOLOGY INC) PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 PDF资料下载
参数资料
| 型号： | M1010-01-155.5200 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
| 封装： | 9 X 9 MM, CERAMIC, LCC-36 |
| 文件页数： | 4/8页 |
| 文件大小： | 154K |
| 代理商： | M1010-01-155.5200 |
M1010-01 Datasheet Rev 0.5
4 of 8
Revised 30Mar2005
Integr ate d Circuit Systems , In c. ● Comm unication s Modules ● www.icst.com ● tel (508) 852-5400
Integrated
Circuit
Systems, Inc.
M1010-01
VCSO BASED CLOCK JITTER ATTENUATOR
Preliminar y In f o r m atio n
External Loop Filter
To provide stable PLL operation, the M1010-01 requires
the use of an external loop filter. This is implemented by
connecting passive external components to the device
as shown in Figure 4 below.
The M1010-01 utilizes a differential analog signal path
to minimize noise coupling from the system. Because of
this, the loop filter implementation requires two identical
complementary RC filters as shown here.
Figure 4: External Loop Filter
PLL bandwidth is affected by the “M” value and the
“Mfin” value, as well as the VCSO frequency.
The various SEL1:0 settings can be used to actively
change PLL loop bandwidth in a given application. See
“SEL2:0 Look-up Table (LUT)” on pg. 3.
See Table 5, Example Loop Filter Component
Values for M1010-01-155.5200, on pg. 4.
PLL Simulator Tool Available
A free PC software utility is available on the ICS website
(www.icst.com). The M2000 Timing Modules PLL
Simulator is a downloadable application that simulates
PLL jitter and wander transfer characteristics. This
enables the user to set appropriate external loop
component values in a given application.
C
POST
C
POST
VC
nVC
R
POST
nOP_OUT
OP_OUT
R
POST
R
LOOP
R
LOOP
C
LOOP
C
LOOP
OP_IN
nOP_IN
6
7
5
49
8
Example Loop Filter Component Values for M1010-01-155.52001
VCSO Parameters: KVCO = 200kHz/V, RIN = 2050k, VCSO Bandwidth = 700kHz.
Device Configuration
Example External Loop Filter Component Value
Nominal Performance Using These Values
FRef
(MHz)
F
VCSO
(MHz)
Mfin
M, R
Value2
R loop
C loop
R post
C post
PLL Loop
Bandwidth
Damping
Factor
Passband Peak
Amplitude @ Center
(dB)
Freq.
19.44
155.52
8
1
118.0
k
1.0
F
100
k
1000pF
270
Hz
6.5
0.05
10
Hz
2
118.0
k
22.0
F
200
k
1000
pF
134
Hz
6.8
0.04
4
Hz
77.76
155.52
2
1
59.0
k
1.0
F
100
k
1000pF
610
Hz
6.5
0.05
20
Hz
2
59.0
k
2.2
F
100
k
1000pF
267
Hz
6.8
0.04
10
Hz
8
118.0
k
2.2
F
200
k
1000
pF
134
Hz
6.8
0.04
10
Hz
155.52
1
40.2
k
1.0
F
40.2
k
1000pF
740
Hz
6.3
0.05
20
Hz
4
59.0
k
1.0
F
100
k
1000
pF
267
Hz
6.8
0.04
10
Hz
8
76.8
k
2.0
F
200
k
1000pF
180
Hz
6.3
0.05
8
Hz
Table 5: Example Loop Filter Component Values for M1010-01-155.5200
Note 1: K
VCO , VCSO Bandwidth, M Divider Value, and External Loop Filter Component Values determine Loop Bandwidth, Damping Factor,
and Passband Peaking. For PLL Simulator software, go to www.icst.com.
Note 2: For loop timing applications, the recommended value for the product of “Mfin” x “M” is 8 or higher.
相关PDF资料 |
PDF描述 |
|---|---|
| M210E622.080-063K | SPECIALTY LOGIC CIRCUIT, MDIP24 |
| M210E622.080-064M | SPECIALTY LOGIC CIRCUIT, MDIP24 |
| M210E622.080-069K | SPECIALTY LOGIC CIRCUIT, MDIP24 |
| M200PXXX.XXXX-222M | SPECIALTY LOGIC CIRCUIT, MDIP24 |
| M200PXXX.XXXX-223M | SPECIALTY LOGIC CIRCUIT, MDIP24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M1010-01-156.2500 | 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK JITTER ATTENUATOR |
| M1010-01I155.5200 | 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK JITTER ATTENUATOR |
| M1010-01I156.2500 | 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK JITTER ATTENUATOR |
| M10100600 | 制造商:Nortools International Ltd 功能描述:MASONRY DRILL BIT,6MM |
| M10100800 | 制造商:Nortools International Ltd 功能描述:MASONRY DRILL BIT,8MM |
发布紧急采购，3分钟左右您将得到回复。