参数资料
型号: M1033-16-167.7097LF
元件分类: 时钟及定时
英文描述: 1033 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36
封装: 9 X 9 MM, CERAMIC, LCC-36
文件页数: 12/14页
文件大小: 200K
代理商: M1033-16-167.7097LF
M1033/34 Preliminary Information 0.1
7 of 14
Revised 07Apr2005
Integr ated Circuit Systems , Inc. Netw o r ki ng & C o mmun ica t io ns ww w. icst.com tel (5 08) 85 2-54 00
M1033/34
VCSO BASED CLOCK PLL WITH AUTOSWITCH
Preliminar y In f o r m atio n
Integrated
Circuit
Systems, Inc.
Using the AutoSwitch Feature
See also Table 6, Example AutoSwitch Sequence.
In application, the system must be powered up with the
device in Manual Select mode (AUTO pin is set low).
The activity monitor output (LOR) should then be polled
to verify that the input clock reference is valid.
REF_SEL should be set to select the desired input
clock reference. This selection determines the
reference clock to be used in Manual Select mode and
the initial reference clock used in AutoSwitch mode.
Sufficient time must be allocated for the PLL to acquire
lock to the selected input reference. In most system
configurations, where loop bandwidth is in the range of
100-1000 Hz and damping factor below 10, a delay of
500 ms should be sufficient. The REF_SEL input state
must be maintained when switching to AutoSwitch
mode (AUTO pin high) and in addition must still be
maintained until a reference fault occurs. If a reference
fault occurs on the selected reference input, the LOR
output goes high and the input reference is
automatically reselected. The REF_ACK output always
indicates the reference selection status and the LOR
output always indicated the selected input reference
clock status. A successful automatic reselection is
indicated by a change of state of the REF_ACK output.
If an automatic reselection is made to a non-active
reference clock input, the REF_ACK output will
change state and both LOR outputs will remain high.
No further automatic reselection is made by the device;
only one reselection is made each time the AutoSwitch
mode is armed by the system. AutoSwitch mode is
re-armed by the system by placing the device into
Manual Select mode (AUTO pin low) and then into
AutoSwitch mode again (AUTO pin high). Following an
automatic reselection and prior to selecting Manual
Select mode (AUTO pin low), the REF_SEL pin has no
control of reference selection. To prevent an
unintentional reference reselection, AutoSwitch mode
must not be re-enabled until the desired state of the
REF_SEL pin is set and the LOR output is low. It is
recommended to delay the re-arming of AutoSwitch
mode, following an automatic reselection, to ensure the
PLL is fully locked on the new reference.
Example AutoSwitch Sequence
0 = Low; 1 = High. Example with REF_SEL initially set to 0 (i.e., DIF_REF0 selected)
REF_SEL Selected
Clock Input
REF_ACK AUTO
LOR
Conditions
Input
Output
Input
Output
Initialization
0
DIF_REF0
0
Device power-up. Manual Select mode. DIF_REF0 input selected as the working reference.
Both input references should be active.
0
DIF_REF0
0
-1-
0
AUTO set to 1: Device placed in AutoSwitch mode (with DIF_REF0 as working reference
clock).
Operation & Activation
0
DIF_REF0
0
1
0
Normal operation with AutoSwitch mode armed, with DIF_REF0 as the working reference
clock; DIF_REF1 is the protection reference clock. Both input references should be active.
0
DIF_REF0
0
1
-1-
Due to loss of reference at DIF_REF0 input (clock fault), the LOR output asserts high, then
device immediately goes to the following stage below.
0
-DIF_REF1-
-1-
1
-0-
Device initiates an automatic reselection to DIF_REF1 (indicated by REF_ACK pin), and then
the LOR output asserts low, indicating an active reference on DIF_REF1.
Re-initialization
-1-
DIF_REF1
1
-0-
When operation of DIF_REF0 is restored, the device can be prepared once again for
AutoSwitch. Preparation begins by setting the REF_SEL pin to 1, which will maintain the
current reference input selection when entering Manual Select mode.
1
DIF_REF1
1
-0-
0
AUTO set to 0: Manual Select mode entered briefly, manually selecting DIF_REF1 as the
working reference.
1
DIF_REF1
1
-1-
0
AUTO set to 1: Device is now placed in AutoSwitch mode, re-initializing AutoSwitch with
DIF_REF1 now specified as the working reference clock.
Table 6: Example AutoSwitch Sequence
相关PDF资料
PDF描述
M1033-16I167.7097LF 1033 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36
M210P622.080-023M SPECIALTY LOGIC CIRCUIT, MDIP24
M210EXXX.XXXX-111K SPECIALTY LOGIC CIRCUIT, MDIP24
M210EXXX.XXXX-122K SPECIALTY LOGIC CIRCUIT, MDIP24
M210EXXX.XXXX-130K SPECIALTY LOGIC CIRCUIT, MDIP24
相关代理商/技术参数
参数描述
M1034 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK PLL WITH AUTOSWITCH
M1034-11-155.5200 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK PLL WITH AUTOSWITCH
M1034-11-156.2500 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK PLL WITH AUTOSWITCH
M1034-11I155.5200 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK PLL WITH AUTOSWITCH
M1034-11I156.2500 制造商:ICS 制造商全称:ICS 功能描述:VCSO BASED CLOCK PLL WITH AUTOSWITCH