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| 型号： | M1033-16-167.7097LF |
| 元件分类： | 时钟及定时 |
| 英文描述： | 1033 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
| 封装： | 9 X 9 MM, CERAMIC, LCC-36 |
| 文件页数： | 3/14页 |
| 文件大小： | 200K |
| 代理商： | M1033-16-167.7097LF |
M1033/34 Preliminary Information 0.1
11 of 14
Revised 07Apr2005
Integr ated Circuit Systems , Inc. ● Netw o r ki ng & C o mmun ica t io ns ● ww w. icst.com ● tel (5 08) 85 2-54 00
M1033/34
VCSO BASED CLOCK PLL WITH AUTOSWITCH
Preliminar y In f o r m atio n
Integrated
Circuit
Systems, Inc.
ELECTRICAL SPECIFICATIONS
DC Characteristics
Unless stated otherwise, V
CC = 3.3V +5%,TA = 0
oC to +70 oC (commercial), T
A = -40
oC to +85 oC (industrial), F
VCSO = FOUT = 150-175MHz,
LVPECL outputs terminated with 50
to V
CC - 2V
Symbol Parameter
Min
Typ
Max Unit Conditions
Power Supply V
CC
Positive Supply Voltage
3.135
3.3
3.465
V
I
CC
Power Supply Current
175
225
mA
All
Differential
Inputs
V
P
-P
Peak to Peak Input Voltage
DIF_REF0, nDIF_REF0,
DIF_REF1, nDIF_REF1
0.15
V
CMR
Common Mode Input
0.5
Vcc - .85 V
C
IN
Input Capacitance
4
pF
Differential
Inputs with
Pull-down
I
IH
Input High Current (Pull-down)
DIF_REF0, DIF_REF1
150
A
V
CC = VIN =
3.456V
I
IL
Input Low Current (Pull-down)
-5
A
Rpulldown Internal Pull-down Resistance
50
k
Differential
Inputs
Biased to
VCC/2
I
IH
Input High Current (Biased)
nDIF_REF0, nDIF_REF1
150
A
V
IN =
0 to 3.456V
I
IL
Input Low Current (Biased)
-150
A
Rbias
Biased to Vcc/2
See Figure 4
All LVCMOS
/ LVTTL
Inputs
V
IH
Input High Voltage
AUTO, REF_SEL,
MR_SEL3, MR_SEL2,
MR_SEL1, MR_SEL0,
P_SEL1, P_SEL0, NBW
2
Vcc + 0.3 V
V
IL
Input Low Voltage
-0.3
0.8
V
C
IN
Input Capacitance
4
pF
LVCMOS /
LVTTL
Inputs with
Pull-down
I
IH
Input High Current (Pull-down)
AUTO, REF_SEL,
MR_SEL3, MR_SEL2,
MR_SEL1, MR_SEL0,
P_SEL1, P_SEL0
150
A
V
CC = VIN =
3.456V
I
IL
Input Low Current (Pull-down)
-5
A
Rpulldown Internal Pull-down Resistance
50
k
LVCMOS /
LVTTL
Inputs with
Pull-UP
I
IH
Input High Current (Pull-UP)
NBW
5
A
V
CC = 3.456V
V
IN = 0 V
I
IL
Input Low Current (Pull-UP)
-150
A
Rpullup
Internal Pull-UP Resistance
50
k
Differential
Outputs
V
OH
Output High Voltage
FOUT, nFOUT
Vcc - 1.4
Vcc - 1.0 V
V
OL
Output Low Voltage
Vcc - 2.0
Vcc - 1.7 V
V
P
-P
Peak to Peak Output Voltage 1
Note 1: Single-ended measurement. See Figure 6, Output Rise and Fall Time, on pg. 12.
0.4
0.85
V
LVCMOS
Output
V
OH
Output High Voltage
LOR, REF_ACK
2.4
V
CC
V
I
OH= 1mA
V
OL
Output Low Voltage
GND
0.4
V
I
OL= 1mA
Table 10: DC Characteristics
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