参数资料
型号: M1A3PE3000-PQG208
厂商: Microsemi SoC
文件页数: 133/162页
文件大小: 0K
描述: IC FPGA 1KB FLASH 3M 208-PQFP
标准包装: 24
系列: ProASIC3E
RAM 位总计: 516096
输入/输出数: 147
门数: 3000000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 208-BFQFP
供应商设备封装: 208-PQFP(28x28)
ProASIC3E DC and Switching Characteristics
2-58
Revision 13
Output Enable Register
Timing Characteristics
Figure 2-29 Output Enable Register Timing Diagram
50%
Preset
Clear
EOUT
CLK
D_Enable
Enable
tOESUE
50%
tOESUDtOEHD
50%
tOECLKQ
1
0
tOEHE
tOERECPRE
tOEREMPRE
tOERECCLR
tOEREMCLR
tOEWCLR
tOEWPRE
tOEPRE2Q
tOECLR2Q
tOECKMPWH tOECKMPWL
50%
Table 2-88 Output Enable Register Propagation Delays
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
Description
–2
–1
Std. Units
tOECLKQ
Clock-to-Q of the Output Enable Register
0.59 0.67 0.79
ns
tOESUD
Data Setup Time for the Output Enable Register
0.31 0.36 0.42
ns
tOEHD
Data Hold Time for the Output Enable Register
0.00 0.00 0.00
ns
tOESUE
Enable Setup Time for the Output Enable Register
0.44 0.50 0.58
ns
tOEHE
Enable Hold Time for the Output Enable Register
0.00 0.00 0.00
ns
tOECLR2Q
Asynchronous Clear-to-Q of the Output Enable Register
0.67 0.76 0.89
ns
tOEPRE2Q
Asynchronous Preset-to-Q of the Output Enable Register
0.67 0.76 0.89
ns
tOEREMCLR Asynchronous Clear Removal Time for the Output Enable Register
0.00 0.00 0.00
ns
tOERECCLR
Asynchronous Clear Recovery Time for the Output Enable Register
0.22 0.25 0.30
ns
tOEREMPRE Asynchronous Preset Removal Time for the Output Enable Register
0.00 0.00 0.00
ns
tOERECPRE
Asynchronous Preset Recovery Time for the Output Enable Register
0.22 0.25 0.30
ns
tOEWCLR
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
0.22 0.25 0.30
ns
tOEWPRE
Asynchronous Preset Minimum Pulse Width for the Output Enable Register 0.22 0.25 0.30
ns
tOECKMPWH Clock Minimum Pulse Width High for the Output Enable Register
0.36 0.41 0.48
ns
tOECKMPWL Clock Minimum Pulse Width Low for the Output Enable Register
0.32 0.37 0.43
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
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