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参数资料
| 型号： | M25P80VMN6T |
| 厂商： | 意法半导体 |
| 元件分类： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位统一部门，串行闪存 |
| 文件页数： | 12/34页 |
| 文件大小： | 217K |
| 代理商： | M25P80VMN6T |
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M25P05-A
12/34
Figure 11. Write Status Register (WRSR) Instruction Sequence
Write Status Register (WRSR)
The Write Status Register (WRSR) instruction al-
lows new values to be written to the Status Regis-
ter. Before it can be accepted, a Write Enable
(WREN) instruction must previously have been ex-
ecuted. After the Write Enable (WREN) instruction
has been decoded and executed, the device sets
the Write Enable Latch (WEL).
The Write Status Register (WRSR) instruction is
entered by driving Chip Select (S) Low, followed
by the instruction code and the data byte on Serial
Data Input (D).
The instruction sequence is shown in Figure 11.
The Write Status Register (WRSR) instruction has
no effect on b6, b5, b4, b1 and b0 of the Status
Register. b6, b5 and b4 are always read as 0.
Chip Select (S) must be driven High after the
eighth bit of the data byte has been latched in. If
not, the Write Status Register (WRSR) instruction
is not executed. As soon as Chip Select (S) is driv-
en High, the self-timed Write Status Register cycle
(whose duration is t
W
) is initiated. While the Write
Status Register cycle is in progress, the Status
Register may still be read to check the value of the
Write In Progress (WIP) bit. The Write In Progress
(WIP) bit is 1 during the self-timed Write Status
Register cycle, and is 0 when it is completed. At
some unspecified time before the cycle is complet-
ed, the Write Enable Latch (WEL) is reset.
The Write Status Register (WRSR) instruction al-
lows the user to change the values of the Block
Protect (BP1, BP0) bits, to define the size of the
area that is to be treated as read-only, as defined
in Table 2. The Write Status Register (WRSR) in-
struction also allows the user to set or reset the
Status Register Write Disable (SRWD) bit in ac-
cordance with the Write Protect (W) signal. The
Status Register Write Disable (SRWD) bit and
Write Protect (W) signal allow the device to be put
in the Hardware Protected Mode (HPM). The Write
Status Register (WRSR) instruction is not execut-
ed once the Hardware Protected Mode (HPM) is
entered.
C
D
AI02282D
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
7
6
5
4
3
2
0
1
MSB
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| M25P32 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMN6G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE20-VMP6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25PE10-VMN6P | 4 Mbit Uniform Sector, Serial Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M25P80-VMN6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:8 Mbit, Low Voltage, Serial Flash Memory With 25 MHz SPI Bus Interface |
| M25P80VMN6TG | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P80-VMN6TG | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface |
| M25P80VMN6TP | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P80-VMN6TP | 功能描述:IC FLASH 8MBIT 75MHZ 8SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:Forté™ 标准包装:2,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 异步 存储容量:256K (32K x 8) 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 封装/外壳:28-TSSOP（0.465"，11.8mm 宽） 供应商设备封装:28-TSOP 包装:带卷 (TR) 其它名称:71V256SA15PZGI8 |
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