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参数资料
| 型号： | M25PE20-VMP6TP |
| 厂商： | 意法半导体 |
| 元件分类： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位统一部门，串行闪存 |
| 文件页数： | 52/60页 |
| 文件大小： | 310K |
| 代理商： | M25PE20-VMP6TP |
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DC and AC parameters
M25PE20, M25PE10
52/60
AC characteristics (50 MHz operation,
T9HX (0.11μm) process
(1)
)
(2)
(3)
Table 22.
Test conditions specified in
Table 16
and
Table 17
Symbol
Alt.
Parameter
Min.
Typ.
Max.
Unit
f
C
f
C
Clock Frequency for the following instructions:
FAST_READ, RDLR, PW, PP, WRLR, PE, SE,
SSE, DP, RDP, WREN, WRDI, RDSR, WRSR
D.C.
50
MHz
f
R
Clock Frequency for READ instructions
D.C.
33
MHz
t
CH(4)
t
CL(4)
t
CLH
t
CLL
Clock High Time
9
ns
Clock Low Time
Clock Slew Rate
2
(peak to peak)
S Active Setup Time (relative to C)
9
ns
0.1
V/ns
t
SLCH
t
CHSL
t
DVCH
t
CHDX
t
CHSH
t
SHCH
t
SHSL
t
SHQZ(5)
t
CLQV
t
CLQX
t
WHSL(6)
t
SHWL(6)
t
DP(5)
t
RDP(5)
t
W
t
PW(7)
t
CSS
5
ns
S Not Active Hold Time (relative to C)
5
ns
t
DSU
t
DH
Data In Setup Time
2
ns
Data In Hold Time
5
ns
S Active Hold Time (relative to C)
5
ns
S Not Active Setup Time (relative to C)
5
ns
t
CSH
t
DIS
t
V
t
HO
S Deselect Time
100
ns
Output Disable Time
8
ns
Clock Low to Output Valid
8
ns
Output Hold Time
0
ns
Write Protect Setup Time
50
ns
Write Protect Hold Time
100
ns
S to Deep Power-down
3
μs
S High to Standby Mode
30
μs
Write Status Register Cycle Time
3
15
ms
Page Write Cycle Time (256 bytes)
11
23
ms
t
PP(7)
Page Program Cycle Time (256 bytes)
0.8
3
ms
Page Program Cycle Time (n bytes)
int(n/8) × 0.025
(8)
t
PE
t
SE
t
SSE
t
BE
Page Erase Cycle Time
10
20
ms
Sector Erase Cycle Time
1
5
s
SubSector Erase Cycle Time
40
150
ms
Bulk Erase Cycle Time
4.5
10
s
1.
See
Important note on page 6
.
2.
Preliminary data.
3.
Details of how to find the Technology Process in the marking are given in AN1995, see also
Section 13: Part numbering
.
4.
t
CH
+ t
CL
must be greater than or equal to 1/ f
C
Value guaranteed by characterization, not 100% tested in production.
5.
6.
Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.
7.
When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one sequence
including all the bytes versus several sequences of only a few bytes (1
≤
n
≤
256).
int(A) corresponds to the upper integer part of A. E.g. int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
8.
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