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参数资料
| 型号： | M29F002BB45K1 |
| 厂商： | 意法半导体 |
| 英文描述： | 2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| 中文描述： | 2兆位的256Kb × 8，启动座单电源闪存 |
| 文件页数： | 5/22页 |
| 文件大小： | 189K |
| 代理商： | M29F002BB45K1 |
5/22
M29F002BT, M29F002BB, M29F002BNT, M29F002BNB
Table 5. Bus Operations
Note: X = V
IL
or V
IH
.
Operation
E
G
W
Address Inputs
Data
Inputs/Outputs
Bus Read
V
IL
V
IL
V
IH
Cell Address
Data Output
Bus Write
V
IL
V
IH
V
IL
Command Address
Data Input
Output Disable
X
V
IH
V
IH
X
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Read Manufacturer
Code
V
IL
V
IL
V
IH
A0 = V
IL
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
20h
Read Device Code
V
IL
V
IL
V
IH
A0 = V
IH
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
B0h (M29F002BT)
B0h (M29F002BNT)
34h (M29F002BB)
BUS OPERATIONS
There are five standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby and Automatic Standby. See
Table 5, Bus Operations, for a summary. Typically
glitches of less than 5ns on Chip Enable or Write
Enable are ignored by the memory and do not af-
fect bus operations.
Bus Read.
Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs, applying a Low signal, V
IL
, to Chip Enable
and Output Enable and keeping Write Enable
High, V
IH
. The Data Inputs/Outputs will output the
value, see Figure 9, Read Mode AC Waveforms,
and Table 12, Read AC Characteristics, for details
of when the output becomes valid.
Bus Write.
Bus Write operations write to the
Command Interface. A valid Bus Write operation
begins by setting the desired address on the Ad-
dress Inputs. The Address Inputs are latched by
the Command Interface on the falling edge of Chip
Enable or Write Enable, whichever occurs last.
The Data Inputs/Outputs are latched by the Com-
mand Interface on the rising edge of Chip Enable
or Write Enable, whichever occurs first. Output En-
able must remain High, V
IH
, during the whole Bus
Write operation. See Figures 10 and 11, Write AC
Waveforms, and Tables 13 and 14, Write AC
Characteristics, for details of the timing require-
ments.
Output Disable.
The Data Inputs/Outputs are in
the high impedance state when Output Enable is
High, V
IH
.
Standby.
When Chip Enable is High, V
IH
, the
Data Inputs/Outputs pins are placed in the high-
impedance state and the Supply Current is re-
duced to the Standby level.
When Chip Enable is at V
IH
the Supply Current is
reduced to the TTL Standby Supply Current, I
CC2
.
To further reduce the Supply Current to the CMOS
Standby Supply Current, I
CC3
, Chip Enable should
be held within V
CC
± 0.2V. For Standby current
levels see Table 11, DC Characteristics.
During program or erase operations the memory
will continue to use the Program/Erase Supply
Current, I
CC4
, for Program or Erase operations un-
til the operation completes.
Automatic Standby.
If CMOS levels (V
CC
± 0.2V)
are used to drive the bus and the bus is inactive for
150ns or more the memory enters Automatic
Standby where the internal Supply Current is re-
duced to the CMOS Standby Supply Current, I
CC3
.
The Data Inputs/Outputs will still output data if a
Bus Read operation is in progress.
Special Bus Operations
Additional bus operations can be performed to
read the Electronic Signature and also to apply
and remove Block Protection. These bus opera-
tions are intended for use by programming equip-
ment and are not usually used in applications.
They require V
ID
to be applied to some pins.
Electronic Signature.
The memory has two
codes, the manufacturer code and the device
code, that can be read to identify the memory.
These codes can be read by applying the signals
listed in Table 5, Bus Operations.
Block Protection
and
Blocks Unprotection.
Each
block can be separately protected against acci-
dental Program or Erase. Protected blocks can be
unprotected to allow data to be changed.
There are two methods available for protecting
and unprotecting the blocks, one for use on pro-
gramming equipment and the other for in-system
use. For further information refer to Application
Note AN1122, Applying Protection and Unprotec-
tion to M29 Series Flash.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M29F002BB45K1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M29F002BB45K3 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M29F002BB45K3T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M29F002BB45K6 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
| M29F002BB45K6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory |
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