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参数资料
型号： M30600E8-XXXGP
元件分类： 微控制器/微处理器
英文描述： 16-BIT, MROM, MICROCONTROLLER, PQFP100
封装： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数： 114/139页
文件大小： 1782K
代理商： M30600E8-XXXGP
Mitsubishi microcomputers
M16C / 60 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
76
Figure 1.61. Configuration of serial I/O-related registers (3)
UARTi transmit/receive control register 1
Symbol
Address
When reset
UiC1(i=0,1)
03A5 16, 03AD16
02 16
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Bit
symbol
W
R
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
TE
TI
RE
RI
Transmit enable bit
Receive enable bit
Receive complete flag
Transmit buffer
empty flag
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
Note: When using multiple pins to output the transfer clock, the following requirement must be met:
UART1 internal/external clock select bit (bit 3 at address 03A8 16) = “0”.
UART transmit/receive control register 2
Symbol
Address
When reset
UCON
03B0 16
X0000000 2
b7
b6
b5
b4
b3
b2
b1
b0
Bit name
Bit
symbol
W
R
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
CLKMD
0
CLKMD
1
RCSP
UART0 transmit
interrupt cause select bit
UART0 continuous
receive mode enable bit
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enable
UART1 continuous
receive mode enable bit
CLK/CLKS select bit 0
UART1 transmit
interrupt cause select bit
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Normal mode
(CLK output is CLK1 only)
1 : Transfer clock output
from multiple pins
function selected
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enabled
Nothing is assigned.
This bit can neither be set nor reset. When read, its content is indeterminate.
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
(TXEPT = 1)
Must always be “0”
U0IRS
U1IRS
U0RRM
U1RRM
0 : CTS/RTS shared pin
1 : CTS/RTS separated
0 : CTS/RTS shared pin
1 : CTS/RTS separated
Separate CTS/RTS bit
Nothing is assigned.
These bits can neither be set nor reset. When read, the value of these bits is “0”.
Invalid
CLK/CLKS select
bit 1 (Note)
Valid when bit 5 = “1”
0 : Clock output to CLK1
1 : Clock output to CLKS1
Serial I/O
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