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| 型号： | M30624FGPFP-D5 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件页数： | 38/87页 |
| 文件大小： | 919K |
| 代理商： | M30624FGPFP-D5 |
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M16C/62P Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
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page 43
Table 5.28 Memory Expansion and Microprocessor Modes
(for 2- to 3-wait setting, external area access and multiplex bus selection)
VCC1 = VCC2 = 5V
Switching Characteristics
(VCC1 = VCC2 = 5V, VSS = 0V, at Topr = – 20 to 85oC / – 40 to 85oC unless otherwise specified)
Symbol
Standard
Measuring
Condition
Max.
Min.
Parameter
Unit
td(BCLK-AD)
Address Output Delay Time
25
ns
th(BCLK-AD)
Address Output Hold Time (in relation to BCLK)
4
ns
td(BCLK-CS)
Chip Select Output Delay Time
25
ns
th(BCLK-CS)
Chip Select Output Hold Time (in relation to BCLK)
4
ns
th(RD-AD)
Address Output Hold Time (in relation to RD)
(NOTE 1)
td(BCLK-RD)
RD Signal Output Delay Time
25
ns
th(BCLK-RD)
RD Signal Output Hold Time
0
ns
th(WR-AD)
Address Output Hold Time (in relation to WR)
(NOTE 1)
td(BCLK-WR)
WR Signal Output Delay Time
25
ns
td(BCLK-DB)
Data Output Delay Time (in relation to BCLK)
40
ns
th(BCLK-DB)
Data Output Hold Time (in relation to BCLK)
4
ns
td(DB-WR)
Data Output Delay Time (in relation to WR)
(NOTE 2)
ns
th(BCLK-WR)
WR Signal Output Hold Time
0
ns
th(RD-CS)
Chip Select Output Hold Time (in relation to RD)
(NOTE 1)
th(WR-CS)
Chip Select Output Hold Time (in relation to WR)
(NOTE 1)
ns
th(WR-DB)
Data Output Hold Time (in relation to WR)
ns
(NOTE 1)
1. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
[ns]
2. Calculated according to the BCLK frequency as follows:
f(BCLK)
(n–0.5) X 109
–40
[ns]
3. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
–25
[ns]
n is “2” for 2-wait setting, “3” for 3-wait setting.
td(BCLK-ALE)
ALE Signal Output Delay Time (in relation to BCLK)
15
ns
th(BCLK-ALE)
ALE Signal Output Hold Time (in relation to BCLK)
– 4ns
th(ALE-AD)
ALE Signal Output Hold Time (in relation to Adderss)
ns
td(AD-RD)
RD Signal Output Delay From the End of Adress
ns
0
td(AD-WR)
WR Signal Output Delay From the End of Adress
ns
0
tdZ(RD-AD)
Address Output Floating Start Time
ns
8
td(AD-ALE)
ALE Signal Output Delay Time (in relation to Address)
ns
(NOTE 3)
(NOTE 4)
–10
4. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
[ns]
–15
NOTES:
HLDA Output Delay Time
40
ns
td(BCLK-HLDA)
See Figure 5.2
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相关代理商/技术参数 |
参数描述 |
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| M30624FGPFPU5C | 制造商:Renesas Electronics Corporation 功能描述:MCU,M16C/62P Group (M16C/62P, M16C/62PT) |
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| M30624FGPGP#D3 | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-Bit/32-Bit M16C CISC 256KB Flash 3.3V/5V 100-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT R8C CISC 256KB FLASH 3.3V/5V 100LQFP - Trays |
| M30624FGPGP#D3C | 功能描述:IC M16C MCU FLASH 256K 100-LQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/62P 产品培训模块:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 标准包装:1 系列:M16C™ M32C/80/87 核心处理器:M32C/80 芯体尺寸:16/32-位 速度:32MHz 连通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外围设备:DMA，POR，PWM，WDT 输入/输出数:121 程序存储器容量:384KB（384K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:24K x 8 电压 - 电源 (Vcc/Vdd):3 V ~ 5.5 V 数据转换器:A/D 34x10b，D/A 2x8b 振荡器型:内部 工作温度:-20°C ~ 85°C 封装/外壳:144-LQFP 包装:托盘 产品目录页面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
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