- 您现在的位置：买卖IC网 > PDF目录67760 > M306NKFJVGP 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 PDF资料下载
参数资料
| 型号： | M306NKFJVGP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 8/84页 |
| 文件大小： | 586K |
| 代理商： | M306NKFJVGP |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页
Rev.2.10
Aug 25, 2006
page 16 of 81
REJ03B0058-0210
M16C/6N Group (M16C/6NK, M16C/6NM)
2. Central Processing Unit (CPU)
Under development
This document is under development and its contents are subject to change.
Figure 2.1 CPU Registers
2.1 Data Registers (R0, R1, R2, and R3)
The R0 register consists of 16 bits, and is used mainly for transfers and arithmetic/logic operations. R1 to
R3 are the same as R0.
The R0 register can be separated between high (R0H) and low (R0L) for use as two 8-bit data registers.
R1H and R1L are the same as R0H and R0L. Conversely R2 and R0 can be combined for use as a 32-bit
data register (R2R0). R3R1 is analogous to R2R0.
2.2 Address Registers (A0 and A1)
The A0 register consists of 16 bits, and is used for address register indirect addressing and address
register relative addressing. They also are used for transfers and arithmetic/logic operations. A1 is the
same as A0.
In some instructions, A1 and A0 can be combined for use as a 32-bit address register (A1A0).
2. Central Processing Unit (CPU)
Figure 2.1 shows the CPU Registers. The CPU has 13 registers. Of these, R0, R1, R2, R3, A0, A1, and FB
configure a register bank. There are two register banks.
SB
USP
ISP
b15
b0
Static Base Register
User Stack Pointer
Interrupt Stack Pointer
b19
b15
INTBL
INTBH
The upper 4 bits of INTB are INTBH and the lower 16 bits of INTB are INTBL.
b0
Interrupt Table Register
b19
PC
b0
Program Counter
R0H (R0's high bits) R0L (R0's low bits)
R1H (R1's high bits) R1L (R1's low bits)
R2
R3
b31
b15
b8 b7
b0
R2
R3
A0
A1
FB
Data Registers (1)
Address Registers (1)
Frame Base Registers (1)
NOTE:
1. These registers comprise a register bank. There are two register banks.
b15
b0
Carry Flag
Debug Flag
Zero Flag
Sign Flag
Register Bank Select Flag
Overflow Flag
Interrupt Enable Flag
Stack Pointer Select Flag
Reserved Area
Processor Interrupt Priority Level
Reserved Area
b15
b0
FLG
Flag Register
IPL
U
I
O
B
S
Z
D
C
b7
b8
相关PDF资料 |
PDF描述 |
|---|---|
| M306NKFHVGP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| M306NKFJTGP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| M306NKMG-XXXGP | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP100 |
| M306NMFHGP | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP128 |
| M306NKFHTGP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M306NKFJVGP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M306NKME-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKMG-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKT-EPB | 功能描述:EMULATOR PROBE M16C/6N RoHS:否 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
| M306NLFHGP | 制造商:Renesas Electronics Corporation 功能描述: |
发布紧急采购，3分钟左右您将得到回复。