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参数资料
型号： M34509G4FP
元件分类： 微控制器/微处理器
英文描述： 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24
封装： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件页数： 32/145页
文件大小： 1060K
代理商： M34509G4FP
4509 Group
Rev.1.03
2009.07.27
page 125 of 140
REJ03B0147-0103
Skip condition
Datailed description
Carry
flag
CY
–
V12 = 0: (T1F) = 1
V13 = 0: (T2F) =1
–
(D(Y)) = 0 ?
–
Transfers the high-order 4 bits (T27–T24) of timer 2 to register B.
Transfers the low-order 4 bits (T23–T20) of timer 2 to register A.
Transfers the contents of register B to the high-order 4 bits of timer 2 and timer 2 reload register R2L. Trans-
fers the contents of register A to the low-order 4 bits of timer 2 and timer 2 reload register R2L.
Transfers the contents of register B to the high-order 4 bits of timer 2 reload register R2H. Transfers the con-
tents of register A to the low-order 4 bits of timer 2 reload register R2H.
Transfers the contents of timer 1 reload register R1L to timer 1.
Transfers the contents of timer 2 reload register R2L to timer 2.
When V12 = 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag
T1F is “1.” . When the T1F flag is “0,” executes the next instruction.
When V12 = 1 : This instruction is equivalent to the NOP instruction. (V12: bit 2 of interrupt control register V1)
When V13 = 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag
T2F is “1.” When the T2F flag is “0,” executes the next instruction.
When V13 = 1 : This instruction is equivalent to the NOP instruction. (V13: bit 3 of interrupt control register V1)
Transfers the input of port P0 to register A.
Outputs the contents of register A to port P0.
Transfers the input of port P1 to register A.
Outputs the contents of register A to port P1.
Transfers the input of port P2 to the low-order 2 bits (A1, A0) of register A.
“0” is stored to the bit 3 (A3) of register A.
Outputs the contents of the low-order 2 bits (A1, A0) of register A to port P2.
Transfers the input of port P3 to the low-order 2 bits (A1, A0) of register A.
“0” is stored to the bit 3 (A3) of register A.
Outputs the contents of the low-order 2 bits (A1, A0) of register A to port P3.
Sets (1) to port D.
Clears (0) to a bit of port D specified by register Y.
Sets (1) to a bit of port D specified by register Y.
Skips the next instruction when a bit of port D specified by register Y is “0.” Executes the next instruction
when a bit of port D specified by register Y is “1.”
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