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参数资料
| 型号： | M34513M2-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件页数： | 17/99页 |
| 文件大小： | 1204K |
| 代理商： | M34513M2-XXXSP |
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21
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(4) Internal state during an interrupt
The internal state of the microcomputer during an interrupt is as
follows (Figure 14).
Program counter (PC)
An interrupt address is set in program counter. The address to be
executed when returning to the main routine is automatically
stored in the stack register (SK).
Interrupt enable flag (INTE)
INTE flag is cleared to “0” so that interrupts are disabled.
Interrupt request flag
Only the request flag for the current interrupt source is cleared to
“0.”
Data pointer, carry flag, skip flag, registers A and B
The contents of these registers and flags are stored automati-
cally in the interrupt stack register (SDP).
(5) Interrupt processing
When an interrupt occurs, a program at an interrupt address is ex-
ecuted after branching a data store sequence to stack register.
Write the branch instruction to an interrupt service routine at an in-
terrupt address.
Use the RTI instruction to return from an interrupt service routine.
Interrupt enabled by executing the EI instruction is performed after
executing 1 instruction (just after the next instruction is executed).
Accordingly, when the EI instruction is executed just before the RTI
instruction, interrupts are enabled after returning the main routine.
(Refer to Figure 13)
Fig. 13 Program example of interrupt processing
Program counter (PC)
............................................................... Each interrupt address
Stack register (SK)
....................................................................................................
Interrupt enable flag (INTE)
.................................................................. 0 (Interrupt disabled)
Interrupt request flag (only the flag for the current interrupt
source) ................................................................................... 0
Data pointer, carry flag, registers A and B, skip flag
........ Stored in the interrupt stack register (SDP) automatically
The address of main routine to be
executed when returning
Fig. 15 Interrupt system diagram
Fig. 14 Internal state when interrupt occurs
T1F
V12
EXF1
V11
EXF0
V10
Address 2
in page 1
Address 4
in page 1
Address 0
in page 1
T4F
V21
T3F
V20
T2F
V13
Address 8
in page 1
Address A
in page 1
Address 6
in page 1
SIOF
V23
ADF
V22
Completion of
serial I/O transfer
Timer 1
underflow
Timer 4
underflow
Timer 3
underflow
Timer 2
underflow
Completion of
A-D conversion
Address E
in page 1
Address C
in page 1
Request flag
(state retained)
Enable
bit
Enable
flag
INTE
Activated
condition
INT0 pin
(L
→H or
H
→L input)
INT1 pin
(L
→H or
H
→L input)
EI
RTI
Interrupt
service routine
Interrupt
occurs
Interrupt is
enabled
Main
routine
: Interrupt enabled state
: Interrupt disabled state
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M34513M4 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-051FP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-070FP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-XXXSP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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