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参数资料
| 型号： | M34513M2-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件页数： | 22/99页 |
| 文件大小： | 1204K |
| 代理商： | M34513M2-XXXSP |
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26
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(3) External interrupt control registers
Interrupt control register I1
Register I1 controls the valid waveform for the external 0 inter-
rupt. Set the contents of this register through register A with the
TI1A instruction. The TAI1 instruction can be used to transfer the
contents of register I1 to register A.
Interrupt control register I2
Register I2 controls the valid waveform for the external 1 inter-
rupt. Set the contents of this register through register A with the
TI2A instruction. The TAI2 instruction can be used to transfer the
contents of register I2 to register A.
Table 8 External interrupt control registers
I13
I12
I11
I10
I23
I22
I21
I20
Not used
Interrupt valid waveform for INT0 pin/
return level selection bit (Note 2)
INT0 pin edge detection circuit control bit
INT0 pin
timer 1 control enable bit
This bit has no function, but read/write is enabled.
Falling waveform (“L” level of INT1 pin is recognized with the SNZI1
instruction)/“L” level
Rising waveform (“H” level of INT1 pin is recognized with the SNZI1
instruction)/“H” level
One-sided edge detected
Both edges detected
Disabled
Enabled
Not used
Interrupt valid waveform for INT1 pin/
return level selection bit (Note 3)
INT1 pin edge detection circuit control bit
INT1 pin
timer 3 control enable bit
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: When the contents of I12 is changed, the external interrupt request flag EXF0 may be set. Accordingly, clear EXF0 flag with the SNZ0 instruction.
3: When the contents of I22 is changed, the external interrupt request flag EXF1 may be set. Accordingly, clear EXF1 flag with the SNZ1 instruction.
Interrupt control register I1
R/W
at RAM back-up : state retained
at reset : 00002
This bit has no function, but read/write is enabled.
Falling waveform (“L” level of INT0 pin is recognized with the SNZI0
instruction)/“L” level
Rising waveform (“H” level of INT0 pin is recognized with the SNZI0
instruction)/“H” level
One-sided edge detected
Both edges detected
Disabled
Enabled
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Interrupt control register I2
R/W
at RAM back-up : state retained
at reset : 00002
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M34513M4 | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-051FP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-070FP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M4-XXXSP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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