参数资料
型号: M34552G8FP
元件分类: 微控制器/微处理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP48
封装: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件页数: 10/143页
文件大小: 0K
代理商: M34552G8FP
8: REGISTERS
S1D13505F00A HARDWARE FUNCTIONAL
EPSON
1-95
SPECIFICATION (X23A-A-001-12)
bit 4
RAS#-to-CAS# Delay Value (NRCD)
This bit selects the DRAM RAS#-to-CAS# delay parameter, tRCD. This bit species the
number (NRCD) of MCLK periods (TM) used to create tRCD. NRCD must be chosen to sat-
isfy the RAS# access time, tRAC. Note, these formulae assume an MCLK duty cycle of 50
± 5%.
NRCD = Round-Up ((tRAC + 5)/TM - 1)
if EDO and NRP = 1 or 2
= 2
if EDO and NRP = 1.5
= Round-Up (tRAC/TM - 1)
if FPM and NRP = 1 or 2
= Round-Up (tRAC/TM - 0.45)
if FPM and NRP = 1.5
Note that for EDO-DRAM and NRP = 1.5, this bit is automatically forced to 0 to select 2
MCLK for NRCD. This is done to satisfy the CAS# address setup time, tASC.
The resulting tRCD is related to NRCD as follows:
tRCD
= (NRCD) TM
if EDO and NRP = 1 or 2
tRCD
= (1.5) TM
if EDO and NRP = 1.5
tRCD
= (NRCD + 0.5) TM
if FPM and NRP = 1 or 2
tRCD
= (NRCD) TM
if FPM and NRP = 1.5
bits 3–2
RAS# Precharge Timing Value (NRP) Bits [1:0]
Minimum Memory Timing for RAS# precharge
These bits select the DRAM RAS# Precharge timing parameter, tRP. These bits specify
the number (NRP) of MCLK periods (TM) used to create tRP – see the following formulae.
Note, these formulae assume an MCLK duty cycle of 50 +/- 5%.
NRP = 1
if (tRP/TM) < 1
= 1.5
if 1
≤ (tRP/TM) < 1.45
= 2
if (tRP/TM)
≥ 1.45
The resulting tRP is related to NRP as follows:
tRP = (NRP + 0.5) TM
if FPM refresh cycle and NRP = 1 or 2
tRP = (NRP) TM
for all other
bits 1–0
Reserved
These bits must be set to 0.
Table 8-12 Minimum Memory Timing Selection
REG[22h] Bits [6:5]
NRC
Minimum Random Cycle Width (tRC)
00
5
5 TM
01
4
4 TM
10
3
3 TM
11
Reserved
Table 8-13 RAS#-to-CAS# Delay Timing Select
REG[22h] Bit 4
NRCD
RAS#-to-CAS# Delay (tRCD)
022
111
Table 8-14 RAS# Precharge Timing Select
REG[22h] Bits [3:2]
NRP
RAS# Precharge Width (tRP)
00
2
01
1.5
10
1
11
Reserved
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