14
MITSUBISHI MICROCOMPUTERS
M35062-XXXSP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Interlace
Noninterlace
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EX
SCOR
SELCOR
—
DSPON
DSPONV
—
BLK
SEPV0
SEPV1
TEST15
TEST16
PALH
MPAL
PAL/NTSC
___
(9) Address 2B0
16
Status
DA
Register
Contents
Function
Remarks
External synchronization
Internal synchronization
Superimpose black and white display
Superimpose coloring display
Normal
Can not be used.
Must be cleared to 0.
Digital output display OFF
Digital output display ON
Composite video output display OFF
Composite video output display ON
Must be cleared to 0.
Matrix outline
Matrix outline + border (border color is black)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Test mode (Must be cleared to 0.)
Interlace/noninterlace normal mode
Interlace/noninterlace expansion mode
MPAL
0
1
0
1
Format
NTSC
M-PAL
PAL
Setting disabled
PAL/NTSC
0
0
1
1
Refer to Table 3 and 6.
Only at register “DSP1
XX
”
= 1 (
XX
= 00 ~ 16) is valid.
Method of sync separation from composite video.
Valid at only PAL and MPAL
mode.
SEPV1
0
0
1
1
SEPV0
0
1
0
1
Composite Sync Spearation Function
Separation is performed during 1 in vertical blanking period
Separation is performed during 2 in vertical blanking period
Separation is performed during 3 in vertical blanking period
Setting disabled
Case
1
condition: vertical sync must repeat 2X
within
2
or
3
; indicates this area.
(Note 1)
Valid at only register “EX”=0 (at exter-
nal synchronous) (Note 2, 3 and 4)
Notes
1: For internal synchronization, shut out (mute) the external video signal input, outside the IC. This avoids external video signal leaks
inside the IC.
2: For superimposed color displays, input an fsc signal which is synchronized with the color burst of the composite video signal (input to
the CVIN pin) to the OSCIN pin.
3: When EX (address 2B016) = “1” (internal synchronization), set the SCOR register to “0”.
4: When using a crystal oscillator (for the fsc input) between the OSCIN and OSCOUT pin, set the SCOR register to “0”.
3
2
1