参数资料
型号: M37272M6H-XXXSP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42
封装: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件页数: 127/132页
文件大小: 1736K
代理商: M37272M6H-XXXSP
93
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6H/M8H/MAH/MFH–XXXSP/FP
M37272E8SP/FP, M37272EFSP/FP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
8.14 CLOCK GENERATING CIRCUIT
This microcomputer has 2 built-in oscillation circuits. An oscillation
circuit can be formed by connecting a resonator between XIN and
XOUT (XCIN and XCOUT). Use the circuit constants in accordance with
the resonator manufacturer’s recommended values. No external re-
sistor is needed between XIN and XOUT since a feed-back resistor
exists on-chip. However, an external feed-back resistor is needed
between XCIN and XCOUT. When using XCIN-XCOUT as sub-clock,
clear bits 5 and 6 of the OSD control register to “0.” To supply a clock
signal externally, input it to the XIN (XCIN) pin and make the XOUT
(XCOUT) pin open. When not using XCIN clock, connect the XCIN to
VSS and make the XCOUT pin open.
After reset has completed, the internal clock
φ is half the frequency of
XIN. Immediately after poweron, both the XIN and XCIN clock start
oscillating. To set the internal clock
φ to low-speed operation mode,
set bit 7 of the CPU mode register to “1.”
8.14.1 OSCILLATION CONTROL
(1) Stop Mode
The built-in clock generating circuit is shown in Figure 120. When the
STP instruction is executed, the internal clock
φ stops at HIGH. At
the same time, timers 3 and 4 are connected by hardware and “FF16
is set in timer 3 and “0716” is set in timer 4. Select f(XIN)/16 or f(XCIN)/
16 as the timer 3 count source (set both bit 0 of the timer mode
register 2 and bit 6 at address 00C716 to “0” before the execution of
the STP instruction). Moreover, set the timer 3 and timer 4 interrupt
enable bits to disabled (“0”) before execution of the STP instruction.
The oscillator restarts when external interrupt is accepted. However,
the internal clock
φ keeps its HIGH level until timer 4 overflows, al-
lowing time for oscillation stabilization when a ceramic resonator or a
quartz-crystal oscillator is used.
(2) Wait Mode
When the WIT instruction is executed, the internal clock
φ stops in
the HIGH level but the oscillator continues running. This wait state is
released at reset or when an interrupt is accepted (See note). Since
the oscillator does not stop, the next instruction can be executed at
once.
Note: In the wait mode, the following interrupts are invalid.
VSYNC interrupt
OSD interrupt
All timer interrupts using external clock input from port pin as count
source
All timer interrupts using f(XIN)/2 or f(XCIN)/2 as count source
All timer interrupts using f(XIN)/4096 or f(XCIN)/4096 as count source
f(XIN)/4096 interrupt
Multi-master I2C-BUS interface interrupt
Data slicer interrupt
A-D conversion interrupt
Fig.8.14.1 Ceramic Resonator Circuit Example
Fig.8.14.2 External Clock Input Circuit Example
(3) Low-speed Mode
If the internal clock is generated from the sub-clock (XCIN), a low
power consumption operation can be realized by stopping only the
main clock XIN. To stop the main clock, set bit 6 (CM6) of the CPU
mode register (00FB16) to “1.” When the main clock XIN is restarted,
the program must allow enough time to for oscillation to stabilize.
Note that in low-power-consumption mode the XCIN-XCOUT drivability
can be reduced, allowing even lower power consumption. To reduce
the XCIN-XCOUT drivability, clear bit 5 (CM5) of the CPU mode regis-
ter (00FB16) to “0.” At reset, this bit is set to “1” and strong drivability
is selected to help the oscillation to start. When an STP instruction is
executed, set this bit to “1” by software before executing.
XCIN
XIN
CCIN
Microcomputer
XCOUT
Rf
Rd
CCOUT
XOUT
CIN
COUT
XCIN
Microcomputer
External oscillation
circuit or external
pulse
XCOUT XIN
XOUT
OpenOpen
External oscillation
circuit
Vcc
Vss
Vcc
Vss
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