参数资料
型号: M37702S1AFP
元件分类: 微控制器/微处理器
英文描述: 16-BIT, 16 MHz, MICROCONTROLLER, PQFP80
封装: QFP-80
文件页数: 15/61页
文件大小: 760K
代理商: M37702S1AFP
19
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 19 Timer Aj mode register bit configuration when per-
forming two-phase pulse signal processing in event
counter mode
Data write and data read are performed in the same way as for
timer mode. That is, when data is written to timer Ai halted, it is
also written to the reload register and the counter. When data is
written to timer Ai which is busy, the data is written to the reload
register, but not to the counter. The counter is reloaded with new
data from the reload register at the next reload time. The counter
can be read at any time.
In event counter mode, whether to increment or decrement the
counter can also be determined by supplying two-phase pulse in-
put with phase shifted by 90° to timer A2, A3, or A4. There are two
types of two-phase pulse processing operations. One uses timers
A2 and A3, and the other uses timer A4. In either processing op-
eration, two-phase pulse is input in the same way, that is, pulses
out of phase by 90° are input at the TAjOUT (j = 2 to 4) pin and
TAjIN pin.
When timers A2 and A3 are used, as shown in Figure 17, the
count is incremented when a rising edge is input to the TAkIN pin
after the level of TAkOUT (k = 2, 3) pin changes from “L” to “H”, and
when the falling edge is inserted, the count is decremented.
For timer A4, as shown in Figure 18, when a phase related pulse
with a rising edge input to the TA4IN pin is input after the level of
TA4OUT pin changes from “L” to “H”, the count is incremented at
the respective rising edge and falling edge of the TA4OUT pin and
TA4IN pin.
When a phase related pulse with a falling edge input to the
TA4OUT pin is input after the level of TA4IN pin changes from “H” to
“L”, the count is decremented at the respective rising edge and
falling edge of the TA4IN pin and TA4OUT pin. When performing
this two-phase pulse signal processing, timer Aj mode register bit
0 and bit 4 must be set to “1” and bits 1, 2, 3, and 5 must be “0”.
Bits 6 and 7 are ignored. Note that bits 5, 6, and 7 of the up-down
flag register (4416) are the two-phase pulse signal processing se-
lection bit for timer A2, A3, and A4 respectively. Each timer
operates in normal event counter mode when the corresponding
bit is “0” and performs two-phase pulse signal processing when it
is “1”.
Count is started by setting the count start flag to “1”. Data write
and read are performed in the same way as for normal event
counter mode. Note that the direction register of the input port
must be set to input mode because two-phase pulse signal is in-
put. Also, there can be no pulse output in this mode.
Fig. 17 Two-phase pulse processing operation of timer A2 and timer A3
Fig. 18 Two-phase pulse processing operation of timer A4
TAkOUT
TAkIN
(k = 2, 3)
Increment-
count
Increment-
count
Increment-
count
Decrement-
count
Decrement-
count
Decrement-
count
Addresses
0 1 : Always “01” in event counter
mode
7 6543 2 1 0
00 1
0 1 0 0 : Always “0100” when processing
two-phase pulse signal
Timer A2 mode register
5816
Timer A3 mode register
5916
Timer A4 mode register
5A16
10 0
! ! : Not used in event counter mode
!
TA4OUT
TA4IN
Increment-count at each edge
Decrement-count at each edge
Increment-count at each edge
Decrement-count at each edge
相关PDF资料
PDF描述
M37702M2AXXXFP 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
M37702S1BFP 16-BIT, 25 MHz, MICROCONTROLLER, PQFP80
M37702S1LGP 16-BIT, 8 MHz, MICROCONTROLLER, PQFP80
M37702S1LHP 16-BIT, 8 MHz, MICROCONTROLLER, PQFP80
M37702M2LXXXHP 16-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
相关代理商/技术参数
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