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参数资料
型号： M38039FFHWG
元件分类： 微控制器/微处理器
英文描述： 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PBGA64
封装： 6 X 6 MM, 0.65 MM PITCH, PLASTIC, FLGA-64
文件页数： 11/117页
文件大小： 1873K
代理商： M38039FFHWG
Rev.3.11
Apr 5, 2006
Page 108 of 113
REJ03B0017-0311
3803 Group (Spec.H)
Notes on Interrupts
1. Change of relevant register settings
When the setting of the following registers or bits is changed, the
interrupt request bit may be set to “1”. When not requiring the
interrupt occurrence synchronized with these setting, take the
following sequence.
Interrupt edge selection register (address 003A16)
Timer XY mode register (address 002316)
Timer Z mode register (address 002A16)
Set the above listed registers or bits as the following sequence.
Fig 88. Sequence of changing relevant register
<Reason>
When setting the followings, the interrupt request bit may be set
to “1”.
When setting external interrupt active edge
Concerned register: Interrupt edge selection register
(address 003A16)
Timer XY mode register (address 002316)
Timer Z mode register (address 002A16)
When switching interrupt sources of an interrupt vector
address where two or more interrupt sources are allocated.
Concerned register: Interrupt source selection register
(address 003916)
2. Check of interrupt request bit
When executing the BBC or BBS instruction to an interrupt
request bit of an interrupt request register immediately after this
bit is set to “0”, execute one or more instructions before
executing the BBC or BBS instruction.
Fig 89. Sequence of check of interrupt request bit
<Reason>
If the BBC or BBS instruction is executed immediately after an
interrupt request bit of an interrupt request register is cleared to
“0”, the value of the interrupt request bit before being cleared to
“0” is read.
Set the interrupt edge select bit (active edge switch bit)
or the interrupt (source) select bit to “1”.
NOP (one or more instructions)
Set the corresponding interrupt enable bit to “0” (disabled).
Set the corresponding interrupt request bit to “0”
(no interrupt request issued).
Set the corresponding interrupt enable bit to “1” (enabled).
NOP (one or more instructions)
Clear the interrupt request bit to “0” (no interrupt issued)
Execute the BBC or BBS instruction
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相关代理商/技术参数
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