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参数资料
| 型号： | M38073M4-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件页数： | 15/75页 |
| 文件大小： | 1279K |
| 代理商： | M38073M4-XXXFP |
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21
3807 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
explained for the timer mode.
Explanation of operation
Counting operation is the same as in timer mode. Moreover the
timer outputs the data set in the corresponding output level latch
(bit 4 of TXM or TYM) to CNTR0/CNTR1 pin each time the timer
underflows. After the timer underflows, the generation of optional
waveform from CNTR0/CNTR1 pin is possible through a change of
values in the output level latch and timer latch.
sPrecautions
Set the double-function port of CNTR0/CNTR1 pin to output in this
mode.
Figure 23 shows the timing chart of the programmable waveform
generation mode.
(6) Programmable one-shot generating mode
Mode selection
This mode can be selected by setting "101" to the following bits.
Timer X operating mode bit (bits 2 to 0) of TXM
Timer Y operating mode bit (bits 2 to 0) of TYM
Count source selection
In high- or middle-speed mode, f(XIN)/2 or f(XIN)/16 can be selected
as the count source.
Interrupt
The interrupt generation at underflow is the same as already
explained for the timer mode. The one-shot generating trigger
condition must be set to the INT0 interrupt edge selection bit (b0)
and INT1 interrupt edge selection bit (b1) of INTEDGE. Setting these
bits to "0" causes the interrupt request being
triggered by a falling edge, setting them to "1" causes the interrupt
request being triggered by a rising edge. The INT0 interrupt request
bit (b0) and INT1 interrupt request bit (b1) of IREQ1 are set to "1" by
detecting the active edge of the INT pin.
Explanation of operation
For a "H" one-shot pulse, set bit 5 of TXM, TYM to "0".
[During timer operation stop]
The output level of CNTR0/CNTR1 pin is initialized to "L" at mode
selection. Set the one-shot pulse width to TXH, TXL, TYH, TYL. A
trigger generation during timer stop (input signal to INT0/INT1 pin)
is invalid.
[During timer operation enabled]
When a trigger generation is detected, "H" is output, and at underflow
"L" is output from CNTR0/CNTR1 pin.
For a "L" one-shot pulse set bit 5 of TXM, TYM to "1".
[During timer operation stop]
The output level of CNTR0/CNTR1 pin is initialized to "H" at mode
selection. Set the one-shot pulse width to TXH, TXL, TYH, TYL. A
trigger generation during timer stop (input signal to INT0/INT1 pin)
is invalid.
[During timer operation enabled]
When a trigger generation is detected, "L" is output, and at underflow
"H" is output from CNTR0/CNTR1 pin.
sPrecautions
Set the double-function port of CNTR0/CNTR1 pin to output and the
double-function port of INT0/INT1 pin to input in this mode.
This mode is unused in low-speed mode.
During one-shot generation permission or one-shot generation the
output level from CNTR0/CNTR1 pin changes if the value of the
CNTR0/CNTR1 active edge switch bit is inverted.
Figure 24 shows the timing chart of the programmable one-shot
generating mode.
(7) PWM mode
Mode selection
This mode can be selected by setting "110" to the following bits.
Timer X operating mode bit (bits 2 to 0) of TXM
Timer Y operating mode bit (bits 2 to 0) of TYM
Count source selection
In high- or middle-speed mode, f(XIN)/2 or f(XIN)/16 can be selected
as the count source.
Interrupt
With a rising edge of CNTR0/CNTR1 output, the timer X interrupt
request bit (b4) and timer Y interrupt request bit (b5) of IREQ1 are
set to "1".
Explanation of operation
PWM waveform is output from CNTR0 pin (in case of timer X) or
from CNTR1 pin (in case of timer Y).
The "H" interval of PWM waveform is determined by the setting
value m (m=0 to 255) of TXH and TYH and the "L" interval of PWM
waveform is determined by the setting value n (n=0 to 255) of TXL
and TYL.
The PWM cycles are:
PWM cycle time = (m+n)ts
PWM duty = m/(m+n)
where: ts: period of timer X/timer Y count source
[During count operation stop]
When a timer value is set to TXL, TXH, TYL, TYH by writing data to
timer and timer latch at the same time. When setting this value, the
output of CNTR0/CNTR1 pin is initialized to the "H" level.
[During count operation enabled]
By setting the bit 0 or 1 of TXYCON to "0", an "H" interval of TXH or
TYH is output first, and after that a "L" level interval of TXL or TYL
are output next. These operations are repeated continuously. The
PWM output is changed after the underflow by setting a timer value,
which is set by writing data to the timer latch only, to TXL, TXH,
TYL, TYH.
sPrecautions
Set the double-function port of CNTR0/CNTR1 pin to output in this
mode.
This mode is unused in low-speed mode.
When the PWM "H" interval is set to "0016", PWM output is "L".
When the PWM "L" interval is set to "0016", PWM output is "H".
When the PWM "H" interval and "L" interval are set to "0016", PWM
output is "L".
When a PWM "H" interval or "L" interval is set to "0016" at least for
a short time, timer X/timer Y interrupt request does not occur.
When the value set to the timer latch is "0016", the value is unde-
fined since the timer counts down by dummy count operation.
Figure 23 shows the timing chart of the PWM mode.
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