参数资料
型号: M38207M8-XXXFP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP80
封装: 0.80 MM PITCH, PLASTIC, QFP-80
文件页数: 16/67页
文件大小: 1099K
代理商: M38207M8-XXXFP
22
MITSUBISHI MICROCOMPUTERS
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Timer X
Timer X is a 16-bit timer that can be selected in one of four modes
and can be controlled the timer X write and the real time port by
setting the timer X mode register.
Timer mode
The timer counts f(XIN)/16 (or f(XCIN)/16 in low-speed mode).
Pulse output mode
Each time the timer underflows, a signal output from the CNTR0
pin is inverted. Except for this, the operation in pulse output mode
is the same as in timer mode. When using a timer in this mode, set
the corresponding port P54 direction register to output mode.
Event counter mode
The timer counts signals input through the CNTR0 pin.
Except for this, the operation in event counter mode is the same
as in timer mode. When using a timer in this mode, set the corre-
sponding port P54 direction register to input mode.
Pulse width measurement mode
The count source is f(XIN)/16 (or f(XCIN)/16 in low-speed mode. If
CNTR0 active edge switch bit is “0”, the timer counts while the in-
put signal of CNTR0 pin is at “H”. If it is “1”, the timer counts while
the input signal of CNTR0 pin is at “L”. When using a timer in this
mode, set the corresponding port P54 direction register to input
mode.
Timer X Write Control
If the timer X write control bit is “0”, when the value is written in the
address of timer X, the value is loaded in the timer X and the latch
at the same time.
If the timer X write control bit is “1”, when the value is written in the
address of timer X, the value is loaded only in the latch. The value
in the latch is loaded in timer X after timer X underflows.
If the value is written in latch only, unexpected value may be set in
the high-order counter when the writing in high-order latch and the
underflow of timer X are performed at the same timing.
Note on CNTR0 Interrupt Active Edge Selec-
tion
CNTR0 interrupt active edge depends on the CNTR0 active edge
switch bit.
Real Time Port Control
While the real time port function is valid, data for the real time port
are output from ports P60 and P61 each time the timer X
underflows. (However, after rewriting a data for real time port, if the
real time port control bit is changed from “0” to “1”, data is output
without the timer X.) If the data for the real time port is changed
while the real time port function is valid, the changed data are out-
put at the next underflow of timer X.
Before using this function, set the corresponding port direction
registers to output mode.
Fig. 12 Structure of timer X mode register
70
Timer X mode register
(TXM : address 002716)
Timer X write control bit
0 : Write value in latch and counter
1 : Write value in latch only
Real time port control bit
0 : Real time port function invalid
1 : Real time port function valid
P60 data for real time port
0 : "L" level output
1 : "H" level output
P61 data for real time port
0 : "L" level output
1 : "H" level output
Timer X operating mode bits
b5 b4
0 0 : Timer mode
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
CNTR0 active edge switch bit
CNTR0 interrupt
0 : Falling edge active
1 : Rising edge active
Pulse output mode
0 : Start at initial level "H" output
1 : Start at initial level "L" output
Event counter mode
0 : Rising edge active
1 : Falling edge active
Pulse width measurement mode
0 : Measure "H" level width
1 : Measure "L" level width
Timer X stop control bit
0 : Count start
1 : Count stop
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