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参数资料
| 型号： | M38239GC-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封装： | 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件页数： | 2/76页 |
| 文件大小： | 896K |
| 代理商： | M38239GC-XXXFP |
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Rev.2.02
Jun 19, 2007
page 10 of 73
REJ03B0146-0202
3823 Group
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 3823 group uses the standard 740 family instruction set. Re-
fer to the table of 740 family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 family instructions are as follows:
The FST and SLW instruction cannot be used.
The STP, WIT, MUL, and DIV instruction can be used.
The central processing unit (CPU) has six registers. Figure 6
shows the 740 Family CPU register structure.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as data
transfer, etc., are executed mainly through the accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y and
specifies the real address.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack ad-
dress are determined by the stack page selection bit. If the stack
page selection bit is “0” , the high-order 8 bits becomes “0016”. If
the stack page selection bit is “1”, the high-order 8 bits becomes
“0116”.
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 7.
Store registers other than those described in Table 4 with program
when the user needs them during interrupts or subroutine calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PCH and PCL. It is used to indicate the address of the
next instruction to be executed.
Fig. 6 740 Family CPU register structure
A
Accumulator
b7
b0
b7
b15
b0
b7
b0
X
Index register X
Y
Index register Y
S
Stack pointer
PCL
Program counter
PCH
N VTB DI ZC
Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
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