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参数资料
| 型号： | M38C29FFAHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 5 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 32/104页 |
| 文件大小： | 1327K |
| 代理商： | M38C29FFAHP |
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Rev.2.00
May 28, 2004
page 31 of 100
38C2 Group (A Version)
SERIAL I/O
The 38C2 group has built-in two 8-bit serial I/O.
Serial I/O can be used as either clock synchronous or asynchronous
(UART) serial I/O. A dedicated timer is also provided for baud rate
generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
serial I/O mode selection bit of the serial I/O control register to “ 1” .
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB.
Fig. 25 Block diagram of clock synchronous serial I/O
Fig. 26 Operation of clock synchronous serial I/O function
1/4
F/F
P56/SCLK1
[P31/SCLK2]
Serial I/O status register
Serial I/O control register
P57/SRDY1
[P30/SRDY2]
P54/RXD1
[P33/RXD2]
P55/TXD1
[P32/TXD2]
f(XIN)
Receive buffer register
Address 001C16
[Address 001E16]
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Clock control circuit
Shift clock
Serial I/O synchronous
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 0FE216
[Address 0FE516]
BRG count source selection bit
Clock control circuit
Falling-edge detector
Transmit buffer register
Data bus
Address 001C16
[Address 001E16]
Shift clock
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request (TI)
Transmit interrupt source selection bit
Address 001D16
[Address 001F16]
Data bus
Address 0FE016
[Address 0FE316]
Transmit shift register
(f(XCIN) in low-speed mode)
[ ] : For Serial I/O2
D7
D0
D1
D2
D3
D4
D5
D6
D0
D1
D2
D3
D4
D5
D6
RBF = 1
TSC = 1
TBE = 0
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TxD
Serial input RxD
Write pulse to receive/transmit
buffer register
Overrun error (OE)
detection
Notes 1: As the transmit interrupt (TI) source, which can be selected, either when the transmit buffer has emptied (TBE = 1) or
after the transmit shift operation has ended (TSC = 1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O control register.
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data
is output continuously from the TxD pin.
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “ 1”
.
Receive enable signal SRDY
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