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参数资料
| 型号： | M38C80EE-XXXFP |
| 厂商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 单芯片8位CMOS微机 |
| 文件页数： | 25/51页 |
| 文件大小： | 874K |
| 代理商： | M38C80EE-XXXFP |
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25
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C8 Group
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
(2) Asynchronous Serial I/O (UART) Mode
Clock asynchronous serial I/O mode (UART) can be selected by clear-
ing the serial I/O mode selection bit of the serial I/O control register
to
“
0
”
.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer register,
but the two buffers have the same address in memory. Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer, and receive data is read from the re-
ceive buffer.
The transmit buffer can also hold the next data to be transmitted, and
the receive buffer register can hold a character while the next char-
acter is being received.
Fig. 22 Block diagram of UART serial I/O
Fig. 23 Operation of UART serial I/O function
f
(
X
I
N
)
1
/
4
O
r
t
s
E
l
P
E F
E
1/16
1
/
1
6
Data bus
Receive buffer register
Address 0018
16
Receive shift register
R
R
e
e
c
c
e
e
i
i
v
v
e
e
b
i
n
u
t
f
e
f
e
r
r
u
f
p
u
l
l
r
f
e
l
a
q
g
u
e
(
R
s
B
(
F
R
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I
r
t
t
)
B
a
u
d
A
r
a
d
t
r
e
e
s
g
s
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n
0
e
0
r
1
a
C
1
t
o
r
F
r
e
q
u
e
n
c
y
d
i
v
i
s
i
o
n
r
a
t
i
o
1
/
(
n
+
1
)
d
6
ST/SP/PA generator
Transmit buffer register
D
a
t
a
b
u
s
Transmit shift register
A
d
d
r
e
s
s
0
0
1
8
1
6
Transmit shift register shift completion flag (TSC)
T
r
a
n
s
m
i
t
b
u
Address 0019
16
f
f
e
r
e
m
p
t
y
f
l
a
g
(
T
B
E
)
Transmit interrupt request (TI)
S
T
d
e
t
e
c
t
o
r
S
P
d
e
t
e
c
t
o
r
UART control register
A
d
d
r
e
s
s
0
0
1
B
1
6
C
h
a
r
a
c
t
e
r
l
e
n
g
t
h
s
e
l
e
c
t
i
o
n
b
i
t
A
d
d
r
e
s
s
0
0
1
A
1
6
BRG count source selection bit
Transmit interrupt source selection bit
S
e
r
i
a
l
I
/
O
c
l
o
c
k
s
e
l
e
c
t
i
o
n
b
i
t
C
l
o
c
k
c
o
n
t
r
o
l
c
i
r
c
u
i
t
C
h
a
r
a
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b
e
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e
n
g
t
h
s
e
l
e
c
t
i
o
n
b
i
t
7
8
b
i
t
s
Serial I/O control register
P4
6
/S
CLK
Serial I/O status register
P
4
4
/
R
X
D
P
4
5
/
T
X
D
T
T
S
B
C
E
=
=
0
1
R
B
F
=
0
T
B
E
=
0
TBE=0
RBF=1
R
B
F
=
1
ST
D
0
D
1
S
P
D
0
D
1
S
T
S
P
T
B
E
=
1
T
S
C
=
1
ST
D
0
D
1
S
P
D
0
D
1
ST
SP
Transmit buffer write signal
G
e
n
e
r
a
t
e
d
a
t
2
n
d
b
i
t
i
n
2
-
s
t
o
p
-
b
i
t
m
o
d
e
1
7
1
1
s
t
r
r
r
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r
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d
p
s
b
i
t
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o
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8
0
2
a
a
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t
r
a
i
p
y
b
b
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b
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t
s
i
t
(
t
s
)
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r
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a
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u
t
p
u
t
T
X
D
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r
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a
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n
p
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t
R
X
D
R
e
c
e
i
v
e
b
u
f
f
e
r
r
e
a
d
s
i
g
n
a
l
Transmit or receive clock
N
o
t
e
s
1
2
:
:
T
E
r
h
e
h
f
r
o
e
l
e
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(
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“
1
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”
r
(
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g
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g
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3
4
:
T
:
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b
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m
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=
“
1
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”
,
.
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.
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=
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.
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