
Rev.3.04
May 20, 2008
REJ03B0158-0304
38D5 Group
TIMERS
8-Bit Timer
The 38D5 Group has four built-in 8-bit timers: Timer 1, Timer 2,
Timer 3, and Timer 4.
Each timer has the 8-bit timer latch. All timers are down-
counters.
When the timer reaches “0016”, the contents of the timer latch is
reloaded into the timer with the next count pulse. In this mode,
the interrupt request bit corresponding to that timer is set to “1”.
The count can be stopped by setting the stop bit of each timer to
“1”.
Fig. 25 Timer 1-4 block diagram
Timer 1 latch (8)
Timer 1 (8)
Timer 2 latch (8)
Timer 2 (8)
Timer 3 latch (8)
Timer 3 (8)
Timer 4 latch (8)
Timer 4 (8)
Timer 1 interrupt request
Timer 2 interrupt request
Timer 3 interrupt request
Timer 4 interrupt request
XCIN
Data bus
Timer 1 count stop bit
10 bit
PWM1
circuit
1/2
Q
S
T
Timer 4 operating
mode selection bit
T4OUT output
edge switch bit
P74
latch
Timer 4 output selection bit
P74 direction
register
P74/PWM1/
T4OUT
10 bit
PWM0
circuit
1/2
Q
S
T
Timer 3 operating
mode selection bit
T3OUT output
edge switch bit
P73
latch
Timer 3 output selection bit
P73 direction
register
P73/PWM0/
T3OUT
“00”
“01”
“10”
“00”
“01”
“1”
“0”
“01”
“10”
“00”
“0”
“1”
“0”
“1”
“0”
Clock for
Timer 1
Clock for
Timer 2
Clock for
Timer 3
Clock for
Timer 4
Timer 1
Timer 2
Timer 3
Timer 4
Frequency division
selection bits
(2 bits for each Timer)
C
lo
c
k
fo
r
T
im
e
r
1
8
The following values can be selected
the clock for Timer;
1/1, 1/2, 1/16, 1/256
Frequency divider
1/2
Q
S
T
T2OUT output
edge switch bit
Timer 2 output selection bit
“0”
“1”
“10”
Timer Y
output
Timer 3 write control bit
PWM01 register (2)
Timer 4 write control bit
Timer 2 write control bit
Timer 1 count
source selection
bits
Timer 2 count
source selection
bits
Timer 2 count stop bit
Timer 3 count source
selection bit
Timer 3 count stop bit
Timer 4 count source
selection bits
Timer 4 count stop bit
Timer 4 output selection bit
φ SOURCE
“11”
f(XIN)
(1)
C
lo
c
k
fo
r
T
im
e
r
2
C
lo
c
k
fo
r
T
im
e
r
3
C
lo
c
k
fo
r
T
im
e
r
4
Note1:
φSOURCE indicates the followings:
XIN input in the frequency/2, 4, or 8 mode
On-chip oscillator divided by 4 in the on-chip oscillator mode
Sub-clock in the low-speed mode
P72 direction
register
P72/T2OUT/CKOUT
P72
latch
Timer 2 output selection bit
“00”
“01”
“10”
P72 clock output control bit
System
clock
φ
XCIN