参数资料
型号: M41ST84W-85MH6TR
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封装: 0.330 INCH, SNAPHAT, PLASTIC, SOH-28
文件页数: 6/32页
文件大小: 168K
代理商: M41ST84W-85MH6TR
M41ST84Y, M41ST84W
14/32
CLOCK OPERATION
The eight byte clock register (see Figure 3, page
15) is used to both set the clock and to read the
date and time from the clock, in a binary coded
decimal format. Tenths/Hundredths of Seconds,
Seconds, Minutes, and Hours are contained within
the first four registers. Bits D6 and D7 of clock reg-
ister 3 (Century/Hours Register) contain the CEN-
TURY ENABLE Bit (CEB) and the CENTURY Bit
(CB). Setting CEB to a ‘1’ will cause CB to toggle,
either from ‘0’ to ‘1’ or from ‘1’ to ‘0’ at the turn of
the century (depending upon its initial state). If
CEB is set to a ‘0’, CB will not toggle. Bits D0
through D2 of register 4 contain the Day (day of
week). Registers 5, 6 and 7 contain the Date (day
of month), Month and Years. The ninth clock reg-
ister is the Control Register (this is described in the
Clock Calibration section). Bit D7 of register 1 con-
tains the STOP Bit (ST). Setting this bit to a ‘1’ will
cause the oscillator to stop. If the device is expect-
ed to spend a significant amount of time on the
shelf, the oscillator may be stopped to reduce cur-
rent drain. When reset to a ‘0’ the oscillator re-
starts within one second.
The eight Clock Registers may be read one byte at
a time, or in a sequential block. The Control Reg-
ister (Address location 08h) may be accessed in-
dependently. Provision has been made to assure
that a clock update does not occur while any of the
seven clock addresses are being read. If a clock
address is being read, an update of the clock reg-
isters will be halted. This will prevent a transition of
data during the read.
Note: Upon power-up following a power failure,
the HT bit will automatically be set to a ‘1’. This will
prevent the clock from updating the TIMEKEEPER
registers, and will allow the user to read the exact
time of the power-down event. Resetting the HT bit
to a ‘0’ will allow the clock to update the TIME-
KEEPER registers with the current time.
TIMEKEEPER
Registers
The M41ST84Y/W offers 12 additional internal
registers which contain the Alarm, Watchdog,
Flag, Square Wave and Control data. These reg-
isters are memory locations which contain external
(user accessible) and internal copies of the data
(usually referred to as BiPORTTM TIMEKEEPER
cells). The external copies are independent of in-
ternal functions except that they are updated peri-
odically by the simultaneous transfer of the
incremented internal copy. TIMEKEEPER and
Alarm Registers store data in BCD. Control,
Watchdog and Square Wave Registers store data
in Binary Format.
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