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参数资料
| 型号： | M41ST85YMX6TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封装： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件页数： | 19/34页 |
| 文件大小： | 532K |
| 代理商： | M41ST85YMX6TR |
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M41ST85Y, M41ST85W
26/34
Figure 21. Bus Timing Requirements Sequence
Table 12. AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL.
Symbol
Parameter(1)
Min
Max
Unit
fSCL
SCL Clock Frequency
0
400
kHz
tBUF
Time the bus must be free before a new transmission can start
1.3
s
tEXPD
EX to ECON Propagation Delay
M41ST85Y
10
ns
M41ST85W
15
tF
SDA and SCL Fall Time
300
ns
tHD:DAT
(2)
Data Hold Time
0
s
tHD:STA
START Condition Hold Time
(after this period the first clock pulse is generated)
600
ns
tHIGH
Clock High Period
600
ns
tLOW
Clock Low Period
1.3
s
tR
SDA and SCL Rise Time
300
ns
tSU:DAT
Data Setup Time
100
ns
tSU:STA
START Condition Setup Time
(only relevant for a repeated start condition)
600
ns
tSU:STO
STOP Condition Setup Time
600
ns
AI00589
SDA
P
tSU:STO
tSU:STA
tHD:STA
SR
SCL
tSU:DAT
tF
tHD:DAT
tR
tHIGH
tLOW
tHD:STA
tBUF
S
P
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