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参数资料
| 型号： | M41T11MH6TR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封装： | 0.330 INCH, SNAPHAT, PLASTIC, SOH-28 |
| 文件页数： | 2/24页 |
| 文件大小： | 355K |
| 代理商： | M41T11MH6TR |
M41T11
10/24
Figure 12. Alternate READ Mode Sequence
WRITE Mode
In this mode the master transmitter transmits to
the M41T11 slave receiver. Bus protocol is shown
in Figure 10. Following the START condition and
slave address, a logic '0' (R/W = 0) is placed on the
bus and indicates to the addressed device that
word address An will follow and is to be written to
the on-chip address pointer. The data word to be
written to the memory is strobed in next and the in-
ternal address pointer is incremented to the next
memory location within the RAM on the reception
of an acknowledge clock. The M41T11 slave re-
ceiver will send an acknowledge clock to the mas-
ter transmitter after it has received the slave
address and again after it has received the word
address
and
each
data
byte
(see
Data Retention Mode
With valid VCC applied, the M41T11 can be ac-
cessed as described above with read or write cy-
cles. Should the supply voltage decay, the
M41T11 will automatically deselect, write protect-
Figure 13. WRITE Mode Sequence
AI00895
BUS ACTIVITY:
ACK
S
ACK
NO
ACK
STOP
START
P
SDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n
DATA n+1
DATA n+X
SLAVE
ADDRESS
AI00591
BUS ACTIVITY:
ACK
S
ACK
STOP
START
P
SDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n
DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
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相关代理商/技术参数 |
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| M41T11SH | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 bit 64b x8 Serial Access TIMEKEEPER SRAM |
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