参数资料
型号: M48T129Y-85CS1
厂商: 意法半导体
元件分类: SRAM
英文描述: 3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM
中文描述: 3.3 - 5V的1兆位的SRAM 128KB的x8计时器
文件页数: 14/22页
文件大小: 140K
代理商: M48T129Y-85CS1
M48T129Y, M48T129V
14/22
Figure 12. Alarm Interrupt Reset Waveform
Figure 13. Back-up Mode Alarm Waveforms
AI02581
AD0-AD7
ACTIVE FLAG BIT
ADDRESS 1FF0h
IRQ/FT
HIGH-Z
15ns Min
AI01678C
VCC
VPFD(max)
VPFD(min)
IRQ/FT
HIGH-Z
AFE bit in Interrupt Register
AF bit in Flags Register
HIGH-Z
VSO
tREC
Calibration values, including the number of sec-
onds lost or gained in a given period, can be found
in Application Note: TIMEKEEPER CALIBRA-
TION. This allows the designer to give the end
user the ability to calibrate the clock as the envi-
ronment requires, even if the final product is pack-
aged in a non-user serviceable enclosure. The
designer could provide a simple utility that access-
es the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT pin.The pin will toggle at 512Hz, when the
Stop bit (ST, D7 of 1FFF9h) is ’0’,the Frequency
Test bit (FT, D6 of 1FFFCh) is ’1’, the Alarm Flag
Enable bit (AFE, D7 of 1FFF6h) is ’0’, and the
Watchdog Steering bit (WDS, D7 of 1FFF7h) is ’1’
or the Watchdog Register (1FFF7h=0) is reset.
Note:
A 4 second settling time must be allowed
before reading the 512Hz output.
Any deviation from 512Hz indicates the degree
and direction of oscillatorfrequency shift atthe test
temperature.
For
example,
512.010124Hz wouldindicatea +20 ppm oscillator
frequency error, requiring a–10 (WR001010)to be
loaded into the Calibration Byte for correction.
Note that setting or changing the Calibration Byte
does not affect the Frequency testoutput frequen-
cy.
a
reading
of
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