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参数资料
| 型号： | M48T129Y-85PM1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, DMA32 |
| 封装： | PLASTIC, MODULE, DIP-32 |
| 文件页数： | 11/30页 |
| 文件大小： | 483K |
| 代理商： | M48T129Y-85PM1 |
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M48T129Y, M48T129V
Power-on Reset
The M48T129Y/V continuously monitors VCC.
When VCC falls to the power fail detect trip point,
the RST pulls low (open drain) and remains low on
power-up for tREC after VCC passes VPFD (max).
The RST pin is an open drain output and an appro-
priate pull-up resistor to VCC should be chosen to
control the rise time.
Battery Low Warning
The M48T129Y/V automatically performs battery
voltage monitoring upon power-up and at factory-
programmed time intervals of approximately 24
hours. The Battery Low (BL) Bit, Bit D4 of Flags
Register 1FFF0h, will be asserted if the battery
voltage is found to be less than approximately
2.5V.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below ap-
proximately 2.5 volts and may not be able to
maintain data integrity in the SRAM. Data should
be considered suspect and verified as correct.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal VCC is
supplied.
The M48T129Y/V only monitors the battery when
a nominal VCC is applied to the device. Thus appli-
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique.
Initial Power-on Defaults
Upon application of power to the device, the fol-
lowing register bits are set to a '0' state: WDS,
BMB0-BMB4, RB0,RB1, AFE, ABE, W, R and FT.
VCC Noise And Negative Going Transients
ICC transients, including those produced by output
switching, can produce voltage fluctuations, re-
sulting in spikes on the VCC bus. These transients
can be reduced if capacitors are used to store en-
ergy which stabilizes the VCC bus. The energy
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1F (see Figure 14.) is
recommended in order to provide the needed fil-
tering.
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on VCC that drive it to values
below VSS by as much as one volt. These negative
spikes can cause data corruption in the SRAM
while in battery backup mode. To protect from
these voltage spikes, ST recommends connecting
a schottky diode from VCC to VSS (cathode con-
nected to VCC, anode to VSS). (Schottky diode
1N5817 is recommended for through hole and
MBRS120T3 is recommended for surface-mount).
Figure 14. Supply Voltage Protection
AI02169
VCC
0.1
F
DEVICE
VCC
VSS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T129YPM | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T129YSH | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T18 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 64Kbit (8 Kb x 8) TIMEKEEPER㈢ SRAM |
| M48T18-100MH1 | 功能描述:RAM其它 8KX8 TIMEKEEP 100NS RoHS:否 制造商:Freescale Semiconductor 封装:Tray |
| M48T18-100MH1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
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