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参数资料
| 型号： | M48T129Y-85PM1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, DMA32 |
| 封装： | PLASTIC, MODULE, DIP-32 |
| 文件页数： | 2/30页 |
| 文件大小： | 483K |
| 代理商： | M48T129Y-85PM1 |
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M48T129Y, M48T129V
10/30
WRITE Mode
The M48T129Y/V is in the WRITE Mode whenever
W (WRITE Enable) and E (Chip Enable) are low
state after the address inputs are stable.
The start of a WRITE is referenced from the latter
occurring falling edge of W or E. A WRITE is termi-
nated by the earlier rising edge of W or E. The ad-
dresses must be held valid throughout the cycle. E
or W must return high for a minimum of tEHAX from
Chip Enable or tWHAX from WRITE Enable prior to
the initiation of another READ or WRITE cycle.
Data-in must be valid tDVWH prior to the end of
WRITE and remain valid for tWHDX afterward. G
should be kept high during WRITE cycles to avoid
bus contention; although, if the output bus has
been activated by a low on E and G a low on W will
disable the outputs tWLQZ after W falls.
Figure 8. WRITE Enable Controlled, WRITE AC Waveforms
Figure 9. Chip Enable Controlled, WRITE AC Waveforms
AI02382
tAVAV
tWHAX
tDVWH
DATA INPUT
A0-A16
E
W
DQ0-DQ7
VALID
tAVWH
tAVEL
tWLWH
tAVWL
tWLQZ
tWHDX
tWHQX
AI02582
tAVAV
tEHAX
tDVWH
A0-A16
E
W
DQ0-DQ7
VALID
tAVEL
tAVWL
tELEH
tWHDX
DATA INPUT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T129YPM | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T129YSH | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V-5V 1 Mbit 128Kb x8 TIMEKEEPER SRAM |
| M48T18 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V, 64Kbit (8 Kb x 8) TIMEKEEPER㈢ SRAM |
| M48T18-100MH1 | 功能描述:RAM其它 8KX8 TIMEKEEP 100NS RoHS:否 制造商:Freescale Semiconductor 封装:Tray |
| M48T18-100MH1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:64 Kbit 8Kb x 8 TIMEKEEPER SRAM |
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