参数资料
型号: M48T35AY-70MH6TR
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDSO28
封装: 0.330 INCH, PLASTIC, SOH-28
文件页数: 24/25页
文件大小: 510K
代理商: M48T35AY-70MH6TR
M48T35AY, M48T35AV
8/25
WRITE Mode
The M48T35AY/V is in the WRITE Mode whenev-
er W and E are low. The start of a WRITE is refer-
enced from the latter occurring falling edge of W or
E. A WRITE is terminated by the earlier rising
edge of W or E. The addresses must be held valid
throughout the cycle. E or W must return high for
a minimum of tEHAX from Chip Enable or tWHAX
from WRITE Enable prior to the initiation of anoth-
er READ or WRITE cycle. Data-in must be valid tD-
VWH prior to the end of WRITE and remain valid for
tWHDX afterward. G should be kept high during
WRITE cycles to avoid bus contention; however, if
the output bus has been activated by a low on E
and G, a low on W will disable the outputs tWLQZ
after W falls.
Figure 8. WRITE Enable Controlled, WRITE Mode AC Waveform
Figure 9. Chip Enable Controlled, WRITE Mode AC Waveforms
AI00926
tAVAV
tWHAX
tDVWH
DATA INPUT
A0-A14
E
W
DQ0-DQ7
VALID
tAVWH
tAVEL
tWLWH
tAVWL
tWLQZ
tWHDX
tWHQX
AI00927
tAVAV
tEHAX
tDVEH
A0-A14
E
W
DQ0-DQ7
VALID
tAVEH
tAVEL
tAVWL
tELEH
tEHDX
DATA INPUT
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