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参数资料
| 型号： | M48T35Y-70MH6 |
| 厂商： | 意法半导体 |
| 英文描述： | 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| 中文描述： | 256千位的32KB的SRAM x8计时器 |
| 文件页数： | 4/19页 |
| 文件大小： | 148K |
| 代理商： | M48T35Y-70MH6 |
M48T35AY, M48T35AV
4/19
READ MODE
The M48T35AY/35AV is in the Read Mode when-
ever W (Write Enable) is high and E (Chip Enable)
is low. The unique address specified by the 15 Ad-
dress Inputs defines which one of the 32,768 bytes
of data is to be accessed. Valid data will be avail-
able at the Data I/O pins within Address Access
time (t
AVQV
) after the last address input signal is
stable, providing that the E and G access times
are also satisfied.
If the E and G access times are not met, valid data
will be available after the latter of the Chip Enable
Access time (t
ELQV
) or Output Enable Access time
(t
GLQV
).
The state of the eight three-state Data I/O signals
is controlled by E and G. If the outputs are activat-
ed before t
AVQV
, the data lines will be driven to an
indeterminate state until t
AVQV
. If the Address In-
puts are changed while E and G remain active,
output data will remain valid for Output Data Hold
time (t
AXQX
) but will go indeterminate until the next
Address Access.
WRITE MODE
The M48T35AY/35AV is in the Write Mode when-
ever W and E are low. The start of a write is refer-
enced from the latter occurring falling edge of W or
E. A write is terminated by the earlier rising edge
of W or E. The addresses must be held valid
throughout the cycle. E or W must return high for
a minimum of t
EHAX
from Chip Enable or t
WHAX
from Write Enable prior to the initiation of another
read or write cycle. Data-in must be valid t
DVWH
prior to the end of write and remain valid for t
WHDX
afterward. G should be kept high during write cy-
cles to avoid bus contention; although, if the output
bus has been activated by a low on E and G, a low
on W will disable the outputs t
WLQZ
after W falls.
Figure 3. Block Diagram
AI01623
LITHIUM
CELL
OSCILLATOR AND
CLOCK CHAIN
VPFD
VCC
VSS
32,768 Hz
CRYSTAL
VOLTAGE SENSE
AND
SWITCHING
CIRCUITRY
8 x 8 BiPORT
SRAM ARRAY
32,760 x 8
SRAM ARRAY
A0-A14
DQ0-DQ7
E
W
G
POWER
相关PDF资料 |
PDF描述 |
|---|---|
| M48T37 | 3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T37YSH | Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:Solid; Jacket Color:Orange; Approval Bodies:UL, CSA; Approval Categories:UL AWM Style 1061; CSA AWM; Conductor Material:Copper; Jacket Material:Polyvinylchloride (PVC) RoHS Compliant: Yes |
| M48T37V-10MH6TR | DIODE ZENER DUAL ISOLATED 200mW 3.3Vz 5mA-Izt 0.0606 5uA-Ir 1 SOT-363 3K/REEL |
| M48T37V-70MH1TR | DIODE ZENER SINGLE 300mW 3.6Vz 5mA-Izt 0.0556 5uA-Ir 1 SOT-23 3K/REEL |
| M48T37V-70MH6 | DIODE ZENER DUAL ISOLATED 200mW 3.6Vz 5mA-Izt 0.0556 5uA-Ir 1 SOT-363 3K/REEL |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T35Y-70MH6E | 功能描述:实时时钟 256K (32Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T35Y-70MH6F | 功能描述:实时时钟 256K (32Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T35Y-70MH6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:256 Kbit 32Kb x8 TIMEKEEPER SRAM |
| M48T35Y-70PC1 | 功能描述:实时时钟 256K (32Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T35Y-70PC1 | 制造商:STMicroelectronics 功能描述:SRAM TIMEKEEPER 256K 48T35 DIP28 |
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