参数资料
型号: M48T559
厂商: 意法半导体
英文描述: 64 Kbit 8Kb x8 TIMEKEEPER SRAM with ADDRESS/DATA MULTIPLEXED
中文描述: 64千位8KB的x8 SRAM的计时与地址/数据复用
文件页数: 10/18页
文件大小: 147K
代理商: M48T559
M48T559Y
10/18
Figure 9. Crystal Accuracy Across Temperature
AI02124
-80
-60
-100
-40
-20
0
20
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
F= -0.038
F
(T - T
0
)
2
±
10%
ppm
C
2
T
0
= 25
°
C
ppm
°
C
The Calibration byte occupies the five lower order
bits (D4-D0) in the Control register (1FF8h). These
bits can be set to represent any value between 0
and 31 in binary form. Bit D5 is a Sign bit; ’1’ indi-
cates positive calibration, ’0’ indicates negative
calibration. Calibration occurs within a 64 minute
cycle. The first 62 minutes in the cycle may, once
per minute, have one second either shortened by
128 or lengthened by 256 oscillator cycles.
If a binary ’1’ is loaded into the register, only the
first 2 minutes in the 64 minute cycle will be modi-
fied; if a binary 6 is loaded, the first 12 will be af-
fected, and so on.
Therefore, each calibration step has the effect of
adding 512 or subtracting 256 oscillator cycles for
every 125,829,120 actual oscillator cycles, that is,
+4.068 or -2.034 ppm of adjustment per calibration
step in the calibration register. Assuming that the
oscillator is in fact running at exactly 32,768Hz,
each of the 31 increments in the Calibration byte
would represent +10.7 or -5.35 seconds per month
which corresponds to a total range of +5.5 or - 2.75
minutes per month.
Two methods are available for ascertaining how
much calibration a given M48T559Y may require.
The first involves simply setting the clock, letting it
run for a month and comparing it to a known accu-
rate reference (like WWV broadcasts). While that
may seem crude, it allows the designer to give the
end user the ability to calibrate his clock as his en-
vironment may require, even after the final product
is packaged in a non-user serviceable enclosure.
All the designer has to do is provide a simple utility
that accesses the Calibration byte.
The second approach is better suited to a manu-
facturing environment, and involves the use of the
IRQ/FT pin. The pin will toggle at 512Hz when the
Stop bit (D7 of 1FF9h) is ’0’, the FT bit (D6 of
1FFCh) is ’1’, the AFE bit (D7 of 1FF6h) is ’0’, and
the Watchdog Steering bit (D7 of 1FF7h) is ’1’ or
the Watchdog Register is reset (1FF7h = 0).
Any deviation from 512Hz indicates the degree
and direction of oscillator frequency shift at the test
temperature. For example, a reading of 512.01024
Hz would indicate a +20 ppm oscillator frequency
error, requiring a -10 (WR001010) to be loaded
into the Calibration Byte for correction. Note that
setting or changing the Calibration Byte does not
affect the Frequency test output frequency.
The FT bit is cleared on power-down.
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